Method and apparatus for seeding differences in lock-stepped processors
AssigneeHewlett-Packard Development Company, L.P.
InventorsKevin David Safford, Jeremy P. Petsinger
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Abstract
An apparatus, and a corresponding method, are used for seeding differences in lock stepped processors, the apparatus implemented on two or more processors operating in a lock step mode. Each of the two or more processors comprise a processor-specific resource operable to seed the differences, a processor logic to execute a code sequence, in which an identical code sequence is executed by the processor logic of each of the two or more processors, and an output to provide a result of execution of the code sequence. The processor outputs, based on execution of the code sequence is provided to a lock step logic operable to read and compare the output of each of the two or more processors.
Claims15
A method for testing loss of lock step among a plurality of processors operable in lock step and executing identical code sequences, the identical code sequences comprising identical code subsequences, the method comprising:
- generating at least a one-bit difference between at least two of the processors, comprising:
- seeding a difference between the at least two processors, wherein the difference comprises a processor-unique value generated by a processor-unique resource, and
- executing the identical code sequences by the at least two processors, comprising:
- in each of the at least two processors, reading the processor-unique value, and
- conditionally executing one or more of the identical code subsequences, wherein a seeded difference is propagated through the at least two processors;
- reading outputs of the at least two processors;
- and
- when two or more outputs differ, signaling a loss of lock step.
An apparatus for testing lock step logic, comprising:
- two or more processors, each processor comprising means for executing code sequences and an output;
- means for seeding differences between the two or more processors,
- wherein the means for seeding differences comprises processor specific resources, and
- wherein the processor specific resources comprise one of a read-only machine specific resource (MSR) and a programmable register;
- and
- means for comparing outputs from the two or more processors, wherein a difference in outputs signals a loss of lock step condition.
An apparatus for seeding differences in lock stepped processors, comprising:
- means for identifying a first lock stepped processor based on a value unique to the first lock stepped processor;
- means for executing a first instruction based on the identify of the first lock stepped processor, wherein the value unique to the first lock stepped processor is an address;
- means for generating a first output based on execution of the first instruction;
- and
- means for comparing the first output to one or more subsequent outputs generated by execution of subsequent instructions on subsequent lock stepped processors, wherein a difference between the first output and any of the subsequent outputs indicates a loss of lock step.
An apparatus that tests loss of lock step among a plurality of lock stepped processors, the lock stepped processors executing identical code sequences, the identical code sequences comprising identical code subsequences, the apparatus comprising:
- means for generating at least a one-bit difference between at least two of the lock stepped processors, comprising:
- means for seeding a difference between the at least two lock stepped processors, wherein the difference comprises a processor-unique value, and
- means for executing the identical code sequences by the at least two lock stepped processors, comprising:
- means for reading the processor-unique value, and
- means for conditionally executing one or more of the identical code subsequences, wherein a seeded difference is propagated through the at least two lock stepped processors;
- means for reading outputs of the at least two processors;
- and
- when two or more outputs differ, means for signaling a loss of lock step.
Dependencies are inferred from the claim text.