Device and method for scrambling data by means of address lines
AssigneeSunplus Technology Co., Ltd.
InventorBor-Sung Liang
Life of this patent
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Abstract
A device and method for scrambling data by means of address lines is disclosed, which includes a seed generator, a first parameter generator, a data scrambler and a de-scrambler. The seed generator is connected to an address bus for generating a seed in accordance with a specific address on the address bus. The first parameter generator is connected to the seed generator for generating a first parameter based on the seed. The data scrambler is connected to a data bus for scrambling data based on the first parameter when a CPU core is to write the data to the specific address. The de-scrambler is connected to the data bus for de-scrambling the data based on the first parameter when the core is to read the data from the specific address.
Claims13
A device for scrambling data by means of address lines, the processor having a CPU core to execute instructions of the processor and to access data through an address bus and a data bus, the device comprising:
- a seed generator, connected to an address bus, for generating a seed in accordance with a specific address on the address bus;
- a first parameter generator, connected to the seed generator, for generating a first parameter based on the seed;
- a data scrambler, connected to a data bus, for scrambling data based on the first parameter when a CPU core is to write the data to the specific address;
- a de-scrambler, connected to the data bus, for de-scrambling the data based on the first parameter when the CPU core is to read the data from the specific;
- and
- a second parameter generator to generate a second parameter, wherein the data scrambler performs scrambling based on the first parameter and the second parameter, and the de-scrambler performs de-scrambling based on the first parameter and the second parameter.
A method for scrambling data by means of address lines, the processor having a CPU core to execute instructions of the processor and to access data through an address bus and a data bus, the method comprising steps:
- a seed generation step, which generates a seed in accordance with a specific address on the address bus;
- a first parameter generation step, which generates a first parameter based on the seed;
- a second parameter generation step, which generates a second parameter;
- a data scramble step, which scrambles data based on the first parameter and the second parameter when a CPU core is to write the data to the specific address;
- and
- a de-scramble step, which de-scrambles the data based on the first parameter and the second parameter when the CPU core is to read the data from the specific address.
Dependencies are inferred from the claim text.