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US 7,398,288 B2Granted
Efficient implementation of a filter
AssigneeBroadcom Corporation
InventorsMark Gonikberg, Haixiang Liang
Life of this patent
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AssigneeBroadcom Corporation
InventorsMark Gonikberg, Haixiang Liang
Estimating the term…
A Finite Impulse Response (FIR) filter is implemented in software on a general purpose processor in a manner which reduces the number of memory accesses as compared to conventional methods. In particular, an efficient implementation for a general purpose processor having a substantial number of registers includes inner and outer loop code which together make K [ ( L 1 + L 2 L 1 L 2 ) N + L 2 L 1 + 1 ] memory accesses and KN multiply-accumulates, where L1 is the number of output vector elements computed during each pass through the outer loop and where L2 is the number of taps per output vector element computed during each pass through the inner loop. The efficient implementation exploits L1+2L2 general purpose registers. For an embodiment in which L1=L2=8, inner and outer loop code make K ( N 4 + 2 ) memory accesses, which for filter implementations with large numbers of taps, approaches a 4× reduction in the number of memory accesses as compared to conventional methods.
An apparatus that includes a communication facility that executes on a processor that also employs other non-communications functionality, the apparatus comprising receive path signal processing structures, wherein at least one of the receive path signal processing structures includes at least one invocation of discrete-time filter code for filtering input vector data, the discrete-time filter code executable by the processor to incrementally load respective portions of the input vector data and coefficient vector data from addressable storage into respective registers of the processor and perform successive scalar multiply-accumulate operations thereupon to accumulate output vector data into other respective registers of the processor wherein the discrete-time filter code includes Finite Impulse Response (FIR) filter code.
A host signal processing implementation of a modem wherein at least a substantial portion of the modem implementation executes on a processor that a host system also employs for application functionality, the modem implementation comprising:
A software modem comprising:
A method of implementing a software modem without use of a digital signal processor (DSP), the method comprising:
An apparatus comprising:
Dependencies are inferred from the claim text.