Parallel switching architecture for multiple input/output
AssigneeSeoul National University Industry Foundation
InventorsHyoung-Il Lee, Seung Woo Seo
Life of this patent
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Abstract
A multiple input/output-queued(MIOQ) switch is presented. This MIOQ switch comprises a (k,m)-dimensional crossbar fabric having k ingress lines and m egress lines; N input buffers at each input; M output buffers at each output; N×k interconnection networks each of which is able to move a packet from each input to one of the k egress lines; and m×M interconnection networks each of which is able to move the arrived packet at output from the m egress lines to one of the M(wherein M is m or N) output buffers. The multiple input/output-queued(MIOQ) switch according to the present invention requires no “speed-up”. Performance matches the performance of an output-queued switch.
Claims17
A multiple input/output-queued switch of which size is N comprising:
- a (k,m)-dimensional crossbar fabric having k ingress lines at each input and m egress lines at each output;
- N input buffers at each input;
- M output buffers at each output;
- N×k interconnection networks each of which is able to move up to k packets from the N input buffers to the k ingress lines;
- and
- m×M interconnection networks each of which is able to move up to m packets arrived at each output from the m egress lines to the M (wherein M is equal to or more than m) output buffers.
Dependencies are inferred from the claim text.