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US 7,397,797 B2Granted
Method and apparatus for performing network processing functions
AssigneeNVIDIA Corporation
InventorsRobert A. Alfieri, Gary D. Hicok, Paul J. Sidenblad, Mark A. Parris
Life of this patent
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Abstract
A novel network architecture that integrates the functions of an internet protocol (IP) router into a network processing unit (NPU) that resides in a host computer's chipset such that the host computer's resources are perceived as separate network appliances. The NPU appears logically separate from the host computer even though, in one embodiment, it is sharing the same chip.
Claims31
A network processing apparatus, said apparatus comprising:
- a host media access controller (HM) subunit for communicating with a host computer;
- a sequence processor (SP) subunit for performing decapsulations, decryption, authentication, and checksum operations on one or more data frames;
- an address translation (AT) subunit for communicating with said sequence processor subunit and performing routing and stateful firewall functions on one or more data frames;
- and
- a media access controller interface (MI) subunit configured to preface the one or more data frames with canonical header information so that the SP and the AT do not have to parse other header information associated with the one or more data frames,
- wherein the network processing apparatus is configured to transmit and receive data frames to and from one or more auxiliary processing units using internet protocols without involving a host processor.
3 more elements
Dependencies are inferred from the claim text.