High-bandwidth high-gain amplifier

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• and
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output,
• wherein said differential transimpedance amplifier comprises a nested differential transimpedance amplifier.

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output;
• and
• a first common-mode feedback circuit that communicates with said differential transimpedance amplifier.

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output;
• and
• a second common-mode feedback circuit that communicates with said second terminal of said second transistor.

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output;
• a first complimentary transistor that is complementary to said first transistor, having a first terminal, a second terminal, and a control terminal that communicates with said control terminal of said first transistor;
• a second complementary transistor that is complementary to said second transistor, having a first terminal that communicates with said first terminal of said first complimentary transistor, a second terminal, and a control terminal that communicates with said control terminal of said second transistor;
• a complementary differential transimpedance amplifier comprising transistors that are complimentary to transistors in said differential transimpedance amplifier, having a first input that communicates with said second terminal of said first complementary transistor, a second input that communicates with said second terminal of said second complementary transistor, a first output, and a second output;
• a complementary differential output amplifier comprising transistors that are complimentary to transistors in said differential output amplifier, having a first input that communicates with said first output of said complementary differential amplifier, a second input that communicates with said second output of said complementary differential amplifier, a first output that communicates with said first output of said differential output amplifier, and a second output that communicates with said second output of said differential output amplifier;
• and
• a third common-mode feedback circuit that selectively injects current into said first terminal of said first complementary transistor.

An analog-to-digital converter (ADC) comprising N cascaded ADC stages, where N is a positive integer, wherein at least one of said cascaded ADC stages comprises:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• and
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output.

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• and
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output,
• wherein said differential transimpedance amplifier is directly coupled to said first terminal of said first transistor.

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• and
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output,
• wherein said differential transimpedance amplifier loads said first terminal of said first transistor.

An amplifier circuit, comprising:

• a first transistor having a control terminal that receives a first amplifier input, a first terminal, and a second terminal;
• a second transistor having a control terminal that receives a second amplifier input, a first terminal, and a second terminal that communicates with said second terminal of said first transistor;
• a differential transimpedance amplifier having a first input that communicates with said first terminal of said first transistor, a second input that communicates with said first terminal of said second transistor, a first output, and a second output;
• and
• a differential output amplifier having a first input that communicates with said first output of said differential transimpedance amplifier, a second input that communicates with said second output of said differential transimpedance amplifier, a first output, and a second output,
• wherein said differential output amplifier is directly coupled to said first output of said differential transimpedance amplifier.