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US 7,397,284 B1Granted
Bootstrapped circuit
AssigneeXilinx, Inc.
InventorPeng Liu
Life of this patent
Estimating the term…
Abstract
A bootstrapping circuit capable of sampling input signals beyond a supply voltage is disclosed. In one embodiment, the bootstrapped circuit is implemented having a reduced area and/or power consumption requirement.
Claims17
A bootstrapping circuit, comprising:
- a first transistor coupled between an input node and an output node, wherein a gate of said first transistor is coupled to a first control node;
- a second transistor having a first end coupled to said first control node, wherein a second end of said second transistor is coupled to a second control node;
- a capacitor having a first end coupled to said second control node, wherein a second end of said capacitor is coupled to a third control node;
- a first switching circuit, coupled to said first control node for connecting a ground node to said first control node;
- a third transistor having a first end coupled to said input node, wherein a gate of said third transistor is coupled to said first control node, and wherein a second end of said third transistor is coupled to said third control node;
- a second switching circuit, coupled to said second transistor for controlling said second transistor, wherein said second switching circuit is coupled to a first clock node;
- a fourth transistor having a first end coupled to said third control node, wherein a gate of said fourth transistor is coupled to a second clock node, and wherein a second end of said fourth transistor is coupled to said ground node;
- a fifth transistor having a first end coupled to said second control node, wherein a gate of said fifth transistor is coupled to a fourth control node, and wherein a second end of said fifth transistor is coupled to a source node;
- a sixth transistor having a first end coupled to said fourth control node, wherein a gate of said sixth transistor is coupled to said source node, and wherein a second end of said sixth transistor is coupled to said first clock node;
- and
- a seventh transistor having a first end coupled to said fourth control node, and wherein a second end of said seventh transistor is coupled to said second control node.
8 more elements
A bootstrapping circuit, comprising:
- a first transistor coupled between an input node and an output node, wherein a gate of said first transistor is coupled to a first control node;
- a second transistor having a first end coupled to said first control node, wherein a second end of said second transistor is coupled to a second control node;
- a capacitor having a first end coupled to said second control node, wherein a second end of said capacitor is coupled to a third control node;
- a first switching circuit, coupled to said first control node for connecting a ground node to said first control node;
- a third transistor having a first end coupled to said input node, wherein a gate of said third transistor is coupled to said first control node, and wherein a second end of said third transistor is coupled to said third control node;
- a second switching circuit, coupled to said second transistor for controlling said second transistor, wherein said second switching circuit is coupled to a first clock node;
- a fourth transistor having a first end coupled to said third control node, wherein a gate of said fourth transistor is coupled to a second clock node, and wherein a second end of said fourth transistor is coupled to said ground node;
- and
- a fifth transistor having a first end coupled to said second control node, wherein a gate of said fifth transistor is coupled to said first control node, and wherein a second end of said fifth transistor is coupled to a source node.
6 more elements
A bootstrapping circuit, comprising:
- a first switching means coupled between an input node and an output node, wherein a gate of said first switching means is coupled to a first control node;
- a second switching means having a first end coupled to said first control node, wherein a second end of said second switching means is coupled to a second control node;
- a charge storing means having a first end coupled to said second control node, wherein a second end of said charge storing means is coupled to a third control node;
- a first switching circuit means, coupled to said first control node for connecting a ground node to said first control node;
- a third switching means having a first end coupled to said input node, wherein a gate of said third switching means is coupled to said first control node, and wherein a second end of said third switching means is coupled to said third control node;
- a second switching circuit means, coupled to said second switching means for controlling said second switching means, wherein said second switching circuit means is coupled to a first clock node;
- a fourth switching means having a first end coupled to said third control node, wherein a gate of said fourth switching means is coupled to a second clock node, and wherein a second end of said fourth switching means is coupled to said ground node;
- a fifth switching means having a first end coupled to said second control node, wherein a gate of said fifth switching means is coupled to a fourth control node, and wherein a second end of said fifth switching means is coupled to a source node;
- a sixth switching means having a first end coupled to said fourth control node, wherein a gate of said sixth switching means is coupled to said source node, and wherein a second end of said sixth switching means is coupled to said first clock node;
- and
- a seventh switching means having a first end coupled to said fourth control node, and wherein a second end of said seventh switching means is coupled to said second control node.
8 more elements
Dependencies are inferred from the claim text.