In-system programming of a non-compliant device using multiple interfaces of a PLD
AssigneeLattice Semiconductor Corporation
InventorsHoward Tang, Satwant Singh, San-Ta Kow
Life of this patent
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Abstract
In one embodiment of the invention, a programmable logic device such as an FPGA includes a programmable fabric; a JTAG interface operable to receive configuration data for programming the fabric; a SPI interface operable to receive and transmit configuration data for programming the fabric; and circuitry coupled to the JTAG and SPI interfaces. The circuitry is operable, without being configured, to transfer configuration data received at the JTAG interface to the SPI interface for transmission to an external device having a SPI interface, such as a serial flash memory.
Claims20
A programmable logic device comprising:
- a programmable fabric;
- a first interface compliant with a first standard and operable to receive configuration data for programming the fabric;
- a second interface compliant with a second standard and operable to receive and transmit configuration data for programming the fabric;
- and
- dedicated circuitry coupled to the first and second interfaces and operable to transfer configuration data received at the first interface in accordance with the first standard to the second interface for transmission therefrom in accordance with the second standard, the dedicated circuitry including:
- a multiplexer having a first input terminal coupled to the first interface, a second input terminal coupled to the programmable fabric, an output terminal coupled to the second interface, and a selection terminal coupled to receive a control signal from the first interface;
- and
- a demultiplexer having an input terminal coupled to the second interface, a first output terminal coupled to transmit signals to the first interface, a second output terminal coupled to the programmable fabric, and a selection terminal coupled to receive a control signal from the first interface.
A method of programming a memory device with configuration data for a programmable logic device, comprising:
- transmitting configuration data to a first interface of the programmable logic device, the first interface compliant with a first standard;
- transferring the configuration data from the first interface through a multiplexer controllable by the first interface to a second interface of the programmable device without configuring the programmable logic device to couple the interfaces, the second interface compliant with a second standard;
- and
- transmitting the configuration data from the second interface of the programmable logic device to an interface of the memory device, the memory device interface compliant with the second standard.
A programmable logic device comprising:
- a programmable fabric;
- a JTAG port operable to receive configuration data for programming the fabric;
- a SPI port operable to receive and transmit configuration data for programming the fabric;
- and
- circuitry coupled to the JTAG and SPI ports and operable, without being configured, to transfer configuration data received at the JTAG port to the SPI port, the circuitry including a multiplexer having a first input terminal coupled to the first interface, a second input terminal coupled to the programmable fabric, an output terminal coupled to the second interface, and a selection terminal coupled to receive a control signal from the first interface.
Dependencies are inferred from the claim text.