Transmission line pulse (TLP) system calibration technique

#1. Field of the Invention

#This invention relates generally to testing systems of integrated circuits and in particular to transmission line pulse systems and devices.

#2. Description of the Related Art

#The present invention can be better understood with reference to the following drawings, which are incorporated in and form a part of this specification, and, together with the description, serve to explain the principles of the present invention. The components within the drawings are not necessarily to scale relative to each other, emphasis instead being placed upon clearly illustrating the principles of the present invention.

#FIG. 1 is a schematic functional diagram of a transmission line pulse test device for testing the integrated circuits that includes the measurement voltage and current signal measurements that are made through a cable connected to the DUT as described in prior art ANSI/ESD SP5.5.1;

#FIGS. 2A-2F illustrate circuit model diagrams of the cable losses incurred when measuring using the circuit of FIG. 1 along with resulting equivalent circuits when either open circuit testing or short circuit testing is being performed;

#In the following description, numerous specific details are provided, such as the identification of various system components, to provide a thorough understanding of embodiments of the invention. One skilled in the art will recognize, however, that the invention can be practiced without one or more of the specific details, or with other methods, components, materials, etc. In still other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of various embodiments of the invention. Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present invention. Thus, the appearance of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.

#As shown in FIG. 1, a transmission line pulser, 100, is designed to measure the impedance of the DUT, 400, with voltage and current monitors placed at position 200 which is separated from the DUT by a cable, 300. Without corrections the measurements of the DUT will have errors induced by the resistance of the interconnecting cable. Resistances of connections to the DUT including its ground return also add to the errors. Especially if an IC wafer DUT is under test, the probe contact resistances of IC wafer DUTs add to the errors. Other errors that can be modeled as series and shunt cable resistances include the loading effects of the current and voltage probes themselves, oscilloscope zero offsets and small impedance changes in the cables and connections. The effects of all such error sources are dealt with in the prior art by measuring an open circuit test load and a short circuit test load, and by adjusting the TLP device's measured results for a DUT under test to provide corrected results where the open circuit current is zero and the short circuit voltage is zero. This is commonly known to those trained in the art as open and short circuit error corrections. It is a common practice to repeat these corrections on a daily basis or whenever the cable or connections to the DUT are changed. This correction should be differentiated from voltage and current calibrations which are gain adjustments so that measured voltages and currents agree with known standards such as NIST traceable secondary standards. It is a common practice to those trained in TLP device operation to make open and short circuit error corrections followed by verifying the calibration or making a new calibration of the voltage and current measurement system reference using known test loads such as Zener diodes or precision resistors. As will be explained, the open and short circuit error corrections of the prior art cause errors in the voltage and current calibrations, such that if a TLP system is calibrated after a first open circuit sand short circuit error correction, then a subsequent open circuit and short circuit error correction operation may cause the voltage and current calibrations to be incorrectly modified. It is a purpose of the present invention to produce an open circuit and short circuit error correction operation that does not impact the voltage and current calibration. It is a common practice in TLP measurements to define the series resistance (aka RSERIES or RS) as the voltage to current ratio measured with a short circuit DUT, and to define the shunt resistance (aka RSHUNT or RSH), or the shunt conductance (the reciprocal of the shunt resistance), as the ratio of voltage to current measured when the DUT is an open circuit (zero ohms). These terms are further explained in FIG. 2.

#FIGS. 2A and 2B diagram two possible simple circuit models for finding the effective “Series Resistance, Rs” and “Shunt Resistance, Rsh” from measuring open and short circuit test loads. Note that the series and shunt resistances in these two circuit models differ only as to the placement order of these resistances. Since each of these models is also used to correct to errors outside the cable 300, and are not expected to be actual physical lumped circuit elements, each model is equally valid, and both are approximations. FIGS. 2C and 2D illustrate the model circuits in an open circuit test mode where RDUT is removed (infinite resistance). In other words, upon measuring an open circuit test load, the circuit models in FIGS. 2A and 2B are reduced to the circuits in FIGS. 2C and 2D, respectively. In FIG. 2D, Rsh is directly measured, while in FIG. 2C the combination of Rs and Rsh is measured. Similarly, FIGS. 2E and 2F illustrate the model circuits in an short circuit test mode where RDUT is a short (zero resistance). In other words, the short circuit load measurement produces reduced circuit models from the circuits in FIGS. 2A and 2B, shown in FIGS. 2E and 2F, respectively, that are different, with the circuit in FIG. 2E measuring Rs directly and the circuit in FIG. 2F measuring a combination of Rs and Rsh. It is a common practice in TLP corrections to assume the simpler of the models and use the circuit in FIG. 2D when calculating the open circuit parameter Rsh and to use the circuit in FIG. 2E when calculating the short circuit parameter Rs. As the following equations show, this simplification is not entirely correct. Equations: