Methods of improving drive currents by employing strain inducing STI liners
AssigneeTexas Instruments Incorporated
InventorsAjith Varghese, Narendra Singh Mehta, Jonathan McAulay Holt
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Abstract
A method forms a semiconductor device comprising isolation structures that selectively induce strain into active regions of NMOS and PMOS devices. Form a hard mask layer over a semiconductor body. A resist layer is formed on the hard mask layer that exposes and defines isolation regions. The hard mask layer is patterned and trench regions are formed using the hard mask layer as a mask. An oxide trench liner that induces compressive strain into active regions of the PMOS region is formed within trench regions of the PMOS region. A nitride trench liner that induces tensile strain into active regions of the NMOS region is formed within the NMOS trench regions.
Claims22
A method of fabricating a semiconductor device comprising isolation structures, the method comprising:
- defining isolation regions and active regions in NMOS and PMOS regions of a semiconductor body;
- forming trench regions within the isolation regions in the PMOS and NMOS regions;
- forming a first trench liner in the trench region within the NMOS region, wherein the first trench liner induces tensile strain into the active regions of the NMOS region;
- and
- forming a second trench liner in the trench region solely within the PMOS region, wherein the second trench liner induces compressive strain into the active regions of the PMOS region.
A method of fabricating a semiconductor device comprising isolation structures, the method comprising:
- defining isolation regions and active regions in NMOS and PMOS regions of a semiconductor body;
- forming trench regions within the isolation regions in the PMOS and NMOS regions;
- forming an oxide trench liner on bottom and sidewall surfaces of the trench regions within the PMOS and NMOS regions;
- etching the oxide trench liner from the NMOS region;
- and
- forming a nitride trench liner the bottom and sidewall surfaces of the trench regions within the NMOS region.
A method of fabricating a semiconductor device comprising isolation structures, the method comprising:
- selecting drive currents for NMOS and PMOS regions;
- defining isolation regions and active regions in NMOS and PMOS regions of a semiconductor body;
- forming trench regions within the isolation regions in the PMOS and NMOS regions;
- forming a tensile strain inducing trench liner within the NMOS region according to the selected drive current for the NMOS region;
- forming a compressive strain inducing liner within the PMOS region according to the selected drive current for the PMOS region;
- filling the trench regions within the NMOS and PMOS regions with a dielectric fill material;
- and
- removing excess dielectric fill material from surfaces of the device.
Dependencies are inferred from the claim text.