Error reduction in a digital-to-analog (DAC) converter

A method of error reduction in a digital-to-analog converter (DAC), wherein the most significant n bits of m-bit digital input signals are processed by using a mapping matrix block and a plurality of selectable source units which supply signals that in combination provide for analog output signals wherein mapping input signals, obtained from digital input signals to be converted into the analog output signals, are supplied to the mapping matrix block and mapping output signals are generated in response to said mapping input signals and to mapping control signals derived from errors occurring in the plurality of selectable source units, the method comprising:

• grouping sets of selectable source units from the plurality of selectable source units based upon the errors occurring in the plurality of selectable source units, wherein the sets of selectable source units include a first set of one selectable source unit and a plurality of sets of two or more selectable source units;
• generating the mapping control signals from the mapping input signals, the mapping control signals selecting one or more set of the sets of selectable source units, wherein for an incremental increase in a digital value of the digital input signals sets of the plurality of sets of two or more selectable source units are successively switched on and alternated with switching on and off the first set of one selectable source unit;
• wherein, at least one of the mapping input signals is applied for the substantially simultaneous generation of the mapping output signals for a number of source units, and
• the (m−n) least significant bits are applied as control signals for source units which supply output signals that are all twice as large with respect to each other, the largest of these output signals having substantially half the output value of one of the source units, said output signals providing in combination with each other for an analog output signal.

A digital-to-analog converter (DAC), for the conversion of n-bit digital input signals into analog output signals, comprising

• a mapping matrix block and
• a plurality of selectable source units, which supply signals that in combination provide for analog output signals,
• wherein mapping input signals, obtained from the digital input signals are supplied to the mapping matrix block and in the mapping matrix block mapping signals are generated in response to said mapping input signals and to mapping control signals derived from errors occurring in the plurality of selectable source units,
• wherein the mapping matrix block is constructed in such a way that under the control of mapping control signals, the number of which corresponding with the number of source units, the source units are operated by mapping input signals, the number of which being smaller than the number of source units.

A digital-to-analog converter (DAC) for converting the n most significant bits of m-bit digital input signals into analog output signals, the DAC comprising

• a mapping matrix block and
• a plurality of selectable source units, which supply signals that in combination provide for analog output signals,
• wherein mapping input signals obtained from the digital input signals are supplied to the mapping matrix block and in the mapping matrix block mapping signals are generated in response to said mapping input signals and to mapping control signals derived from errors occurring in the plurality of selectable source units,
• wherein the mapping matrix block is constructed in such a way that under the control of mapping control signals, the number of which corresponding with the number of source units, the source units are operated by mapping input signals, the number of which being smaller than the number of source units,
• wherein a further plurality of selectable source units is provided which, in response to the (m−n) least significant bits, supply signals that are all twice as large with respect to each other, the largest of these output signals having substantially half the output value of one of the source units, said output signals providing in combination for an analog output signal,
• the digital-to-analog converter further including a combination circuit to combine said analog output signal with the output signal of the digital-to-analog converter.