General purpose set theoretic processor
AssigneeCurtis L. Harris
InventorsCurtis L. Harris, Jack Ring
Life of this patent
Estimating the term…
Abstract
A general purpose processor architecture (methods and apparatuses) that can discern all subsets of a serial data stream which fulfill an arbitrarily complex reference pattern. The invention comprises an ordered set of Detection Cells conditionally interconnected according to the reference pattern and operationally controlling one another's states through the network. The invention preferably includes a Host Interface to enable reporting of Results from a search session as well as the input and control of reference patterns and source data.
Claims18
For use in support of a host device through a host device interface, a general purpose set theoretic processor comprising:
- a pattern memory including a reaction memory unit for receiving source data from said host device and outputting a potential response based on the source data in accordance with a stored pattern;
- a recognition network for receiving the potential response from the pattern memory and transforming the potential response into an output response comprising:
- a state-change routing matrix unit;
- and
- an ordered plurality of detection cells;
- an aggregation network for receiving and processing the output data comprising:
- an aggregation routing matrix;
- and
- a threshold logic unit for generating transformed data from the output response data;
- a local clock and sequencer coupled to said pattern memory, said recognition network and said aggregation network for synchronizing and propagating said source data, said potential response, said output response and said transformed data;
- and
- a data transfer unit for exchanging the source data and the transformed data between said aggregation network and said host device interface.
Dependencies are inferred from the claim text.