US 7,389,460 B1 · Runtime-competitive fault handling for reconfigurable logic devices

Abstract

Methods, systems, apparatus and devices to provide autonomous self-repair for programmable logic. Using Competitive Runtime Reconfiguration, an initial population of functionally identical, yet physically distinct individual programmable logic configurations are produced at design time. During operation, individuals compete for selection based on a fitness function favoring fault-free behavior and any physical resource exhibiting an operationally-significant fault decreases the fitness of those configurations which use it. Through runtime competition, the presence of the fault becomes occluded from the visibility of subsequent operations. Offspring formed through crossover and mutation of faulty and viable configurations are reintroduced into the population to enable evolution of a customized fault-specific repair, realized as new configurations using normal throughput processing operations. In an embodiment, the error detection circuit is also checked for errors.

Claims13

Dependent claims

A programmable logic device with an embedded processor core for executing instructions and memory for storing the instructions and having autonomous fault detection and self-repair capabilities during operation after the configuration process, the programmable logic device further comprising:

plural reconfigurable resources;
a first set of instructions stored in the memory and executed by the processor core for initializing the plural reconfigurable resources into plural individual configurations, wherein the plural individual configurations are paired into a pair of half-configurations;
plural checkers for checking outputs of the plural individual configurations, wherein the plural checkers are paired with the pair of half-configurations;
and
a second set of instruction stored in the memory and executed by the processor core for detecting faults and autonomously repairing faults in the plural individual configurations during the programmable logic device's throughput processing operations, wherein the second set of instructions integrate detection, isolation, diagnosis, and recovery phases of fault-handling into a single operational flow, wherein both transient and permanent faults are handled by the second set of instructions, for autonomous fault detection and self-repair during operation of the programmable logic device.

2 more elements

A system for autonomous self-repair of reconfigurable logic devices when a fault occurs during operation after the configuration process comprising:

a reconfigurable logic device with embedded processor core and memory and having plural resources and plural error detectors;
a set of initialization instructions stored in the memory for initializing the reconfigurable logic device and partitioning the plural resources into pairs of individual half-configurations, each of the individual half-configurations routed to one of the plural error detectors;
and
a set of fault detection and reconfiguration instructions stored in the memory that integrate detection, isolation, diagnosis, and recovery phases of fault-handling into a single operational flow, wherein both transient and permanent faults are handled by the same process during normal throughput processing operations to allow the fault-stricken reconfigurable logic device to remain at least partially operational while being repaired.

1 more element

A method for self-repair of reconfigurable logic devices with an embedded processor core for executing instructions and memory for storing the instructions, the testing and self-repair occurring during normal throughput processing operation after the configuration process, the instructions comprising the steps of:

initializing the reconfigurable logic device wherein plural reconfigurable resources on the programmable logic devices are portioned into plural individuals;
selecting a first and a second one of the plural individuals as a pair of half-configurations, wherein each individual in the pair of half-configurations is functionally equivalent and physically distinct;
detecting a fault in the pair of half-configuration using duplicate paired checkers;
adjusting a fitness of the pair of half-configurations and marking the pair of half-configurations as one of pristine, suspect, under repair and refurbished, wherein if the fault did not occur the fitness is adjusted upward and if the fault did occur the fitness is adjusted downward;
repeating the fault determining and fitness adjustment steps if the fault did not occur;
invoking genetic operators for reconfiguring one of the first and second individuals to repair the fault stricken one of the plural individuals if the fault did occur;
and
looping back to the selection step, wherein the programmable logic device remains operational during the self-repair of the fault-stricken programmable logic device to obtain fault-free operation.

5 more elements

Dependencies are inferred from the claim text.

Runtime-competitive fault handling for reconfigurable logic devices

Life of this patent

Runtime-competitive fault handling for reconfigurable logic devices

Life of this patent

Abstract

Claims13