Encapsulated electronic component and production method

A component comprising:

• a chip having a top surface and having a bottom surface that includes electrically conductive structures;
• a carrier substrate having a top surface that includes connecting areas, the chip being mounted in a flip chip arrangement on the carrier substrate via electrically conductive connections between the electrically conductive structures and the connecting areas;
• a support element at the top surface of the carrier substrate, the support element surrounding the chip but not touching the chip;
• and
• a seal that borders the chip and the support element;
• wherein the support element supports the seal;
• wherein the support element and the seal are configured to reduce an affect of mechanical forces on the electrically conductive connections that results from temperature variations;
• wherein the seal comprises a composite comprising a dielectric layer and a metal layer above the dielectric layer relative to the top surface of the chip, the composite forming a seal to the carrier substrate outside of an area that corresponds to the chip;
• and
• wherein the dielectric layer has a modulus of elasticity of less than 1 Gpa, a thickness of less than 20 μm, or a coefficient of thermal expansion that is greater than αbump/2 and that is less than 2 αbump, where αbump is a coefficient of thermal expansion for at least one of the electrically conductive connections.