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US 7,386,656 B2Granted
Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
AssigneeMetaram, Inc.
InventorsSuresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
Life of this patent
Estimating the term…
Abstract
A memory circuit power management system and method are provided. An interface circuit is in communication with a plurality of memory circuits and a system. In use, the interface circuit is operable to perform a power management operation in association with only a portion of the memory circuits
Claims19
A sub-system, comprising:
- an interface circuit in communication with a plurality of memory circuits and a system, the interface circuit operable to perform a power management operation in association with only a portion of the memory circuits;
- wherein the interface circuit is operable to simulate at least one virtual memory circuit.
A method, comprising:
- interfacing a plurality of physical memory circuits and a system;
- simulating at least one virtual memory circuit;
- and
- performing a power management operation in association with only a portion of the at least one virtual memory circuit.
1 more element
A system, comprising:
- a plurality of physical memory circuits;
- and
- an interface circuit in communication with the physical memory circuits and a system, the interface circuit operable to interface the physical memory circuits and the system for simulating at least one virtual memory circuit and performing a power management operation in association with only a portion of the at least one virtual memory circuit.
Dependencies are inferred from the claim text.