Two-cycle sensing in a two-terminal memory array having leakage current

An apparatus for sensing current in a two-terminal memory array, comprising:

• a plurality of bit block arrays, each bit block array including
• a plurality of first conductive traces and a plurality of second conductive traces,
• an address unit operative to receive an address, to select at least one of the plurality of second conductive traces during a first cycle, to apply a first select voltage to the selected second conductive traces and to apply a non-select voltage potential to un-selected first and second conductive traces during the first cycle,
• to select one of the plurality of first conductive traces during a second cycle, to apply a second select voltage to the selected first conductive trace during;
• and
• a sense unit operative to sense a leakage current flowing through the selected second conductive traces during the first cycle and to sense a total current flowing through the selected second conductive traces during the second cycle.