Signal offset cancellation
AssigneeAltera Corporation
InventorsTin H. Lai, Wilson Wong
Life of this patent
Estimating the term…
Abstract
Techniques and circuitry are provided for programmably controlling signal offsets in integrated circuitry. In one embodiment, an integrated circuit includes a signal offset cancellation circuit that is programmably selected to control the offset of signals on either one input/output or another input/output of an amplifier circuit. In one embodiment, a logic circuit is used to selectively couple a bank of current sources to one input/output or another input/output of a differential amplifier through a switching circuit. The bank of current sources may employed to control the signal offset on either input/output, or may be decoupled from all of the inputs/outputs when signal offset cancellation is not required.
Claims17
An integrated circuit comprising:
- a signal offset cancellation circuit;
- a switching circuit having an output coupled to an input of the signal offset cancellation circuit;
- a first transistor having a first current-carrying terminal, a second current-carrying terminal, and a first signal terminal, wherein the first current-carrying terminal is coupled to an input of the switching circuit;
- a second transistor having a third current-carrying terminal, a fourth current carrying terminal, and a second signal terminal, wherein the third current-carrying terminal is coupled to another input of the switching circuit, wherein an output of the signal offset cancellation circuit is selectably coupled to either the first current-carrying terminal or the third current-carrying terminal through the switching circuit;
- signal select logic that controls the switching circuit and receives N control bits as input;
- and
- offset signal control logic that controls the signal offset cancellation circuit and receives a subset of the N control bits as input.
A programmable logic circuit, comprising:
- a transistor pair having a first signal input, a second signal input, and a first signal output, and a second signal output;
- and
- a signal offset cancellation circuit selectively coupled to either the first signal output or the second signal output, wherein the signal offset cancellation circuit is capable of selectively providing an offset signal to cancel signal offsets outputted from either the first signal output or the second signal output;
- and
- signal control logic configured to control the magnitude of the offset signal,
- wherein the signal offset cancellation circuit comprises a plurality of offset current sources capable of generating the offset signal, and
- wherein the signal control logic controls the signal offset cancellation circuit to use a first set of offset current sources to obtain a first magnitude of the offset signal and controls the signal offset cancellation circuit to use the first set of offset current sources plus one or more additional offset current sources to obtain a second magnitude of the offset signal when the second magnitude is larger than the first magnitude.
Dependencies are inferred from the claim text.