Method and apparatus for inspecting semiconductor device
AssigneeHitachi High-Technologies Corporation
InventorMiyako Matsui
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AssigneeHitachi High-Technologies Corporation
InventorMiyako Matsui
Estimating the term…
A method and apparatus for inspecting a wafer during a semiconductor device fabrication process. The apparatus performs, only via observation from the wafer's top surface, inspection and quantitative evaluation of a portion that is in the shadow of an incident electron beam and a buried structure in the wafer. To this end, the electron beam is emitted so that it partially penetrates a wafer surface and reaches an unexposed pattern portion to the beam. When a stereoscopic structure is constructed from the scan image based on a secondarily generated signal, generate a stereoscopic model of a pattern being tested. The secondary signal is used to detect position information of a pattern edge(s) and signal intensity. Then, use the information to calculate more than one feature quantity of the test pattern. From the calculated feature quantities, the stereoscopic structure is constructed for displaying a 3D structure of the pattern.
A semiconductor inspection apparatus having a length measurement function for performing size measurement between a measurement start point and an end point of a scan image obtainable by scanning a focused electron beam on a wafer, said apparatus comprising:
A semiconductor inspection apparatus having a length measurement function for performing size measurement between a measurement start point and an end point of a scan image obtainable by scanning a focused electron beam on a wafer, said apparatus comprising:
A semiconductor inspection apparatus having a length measurement function for performing size measurement between a length measurement start point and an end point of a scan image obtainable by scanning a focused electron beam on a wafer, said apparatus comprising:
Dependencies are inferred from the claim text.