US 7,362,174 B2 · Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection

Abstract

Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection. Impedance matching and bandwidth extension provides desired gain at higher frequencies and may be achieved at the interface between silicon and package and/or circuit board within various integrated circuits that may be employed within communication devices. In some instances, a differential transistor pair is employed that also includes Miller capacitors coupled between the gate of one transistor of the differential transistor pair to the drain of the other transistor of the differential transistor pair. This can also include series load connected resistors and inductors coupled between the respective drains of the transistors of the differential transistor pair to a power supply voltage. Also, series connected input inductors may also couple to the gates of the transistors of the differential transistor pair.

Claims20

Dependent claims

A current-controlled CMOS (C3MOS) wideband data amplifier circuit, the circuit comprising:

a first differential transistor comprising a source, gate, and drain;
a second differential transistor comprising a source, gate, and drain;
a current source that is coupled to both the source of the first differential transistor and the source of the second differential transistor;
a first output impedance, comprising a first output resistor and a first shunt peaking inductor connected in series, that is coupled between the drain of the first differential transistor and a supply voltage;
a second output impedance, comprising a second output resistor and a second shunt peaking inductor connected in series, that is coupled between the drain of the second differential transistor and the supply voltage;
a differential termination impedance that is coupled between the gate of the first differential transistor and the gate of the second differential transistor;
a first input impedance that is coupled between a first differential input of the C3MOS wideband data amplifier circuit and the gate of the first differential transistor;
and
a second input impedance that is coupled between a second differential input of the C3MOS wideband data amplifier circuit and the gate of the second differential transistor.

6 more elements

A current-controlled CMOS (C3MOS) wideband data amplifier circuit, the circuit comprising:

a first differential input;
a second differential input;
a wideband differential transistor pair comprising a third differential input and a fourth differential input;
an input impedance matching network coupled to the first differential input of the C3MOS wideband data amplifier circuit, the second differential input of the C3MOS wideband data amplifier circuit, the third differential input of the wideband differential transistor pair, and the fourth differential input of the wideband differential transistor pair, wherein input impedance matching network comprises:
a differential termination impedance that is coupled between the third differential input of the wideband differential transistor pair and the fourth differential input of the wideband differential transistor pair;
a first input impedance that is coupled between the first differential input of the C3MOS wideband data amplifier circuit and the third differential input of the wideband differential transistor pair;
and
a second input impedance that is coupled between the second differential input of the C3MOS wideband data amplifier circuit and the fourth differential input of the wideband differential transistor pair.

5 more elements

A current-controlled CMOS (C3MOS) wideband data amplifier circuit, the circuit comprising:

a first differential transistor comprising a source, gate, and drain;
a second differential transistor comprising a source, gate, and drain;
a current source that is coupled to both the source of the first differential transistor and the source of the second differential transistor;
a first output impedance, comprising a first output resistor and a first shunt peaking inductor connected in series, such that the first output resistor is coupled between the drain of the first differential transistor and the first shunt peaking inductor, and the first shunt peaking inductor is coupled between the first output resistor and a supply voltage;
a second output impedance, comprising a second output resistor and a second shunt peaking inductor connected in series, such that the second output resistor is coupled between the drain of the second differential transistor and the second shunt peaking inductor, and the second shunt peaking inductor is coupled between the second output resistor and the supply voltage;
a first capacitor that is coupled between the drain of the first differential transistor and the gate of the second differential transistor;
a second capacitor that is coupled between the drain of the second differential transistor and the gate of the first differential transistor;
at least one resistor connected in series between the gate of the first differential transistor and the gate of the second differential transistor;
a first series inductor that is coupled between a first differential input of the C3MOS wideband data amplifier circuit and the gate of the first differential transistor;
and
a second series inductor that is coupled between a second differential input of the C3MOS wideband data amplifier circuit and the gate of the second differential transistor.

8 more elements

Dependencies are inferred from the claim text.

Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection

Life of this patent

Current-controlled CMOS (C3MOS) wideband input data amplifier for reduced differential and common-mode reflection

Life of this patent

Abstract

Claims20