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US 7,359,240 B2Granted
Flash memory device with multi level cell and burst access method therein
AssigneeSamsung Electronics Co., Ltd.
InventorsJung-Woo Lee, Jae-Yong Jeong
Life of this patent
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Abstract
A flash memory device including memory cells, each memory cell configured to store bits, a sensing circuit configured to sequentially sense, for each memory cell, sets of the bits of the memory cell, a data rearrangement unit configured to receive words of data and to rearrange bits of the words to be stored in the memory cells, and an output circuit configured to output a group of the words using the sets of bits from one sensing, at least as early as during a subsequent sensing of sets of bits.
Claims9
A semiconductor memory device comprising:
- a plurality of memory cells, each memory cell configured to store a plurality of bits;
- a sensing circuit configured to sequentially sense, for each memory cell, a plurality of sets of the bits of the memory cell;
- a data rearrangement unit configured to receive a plurality of words of data and to rearrange bits of the words to be stored in the memory cells;
- and
- an output circuit configured to output a group of the words using the sets of bits from one sensing, at least as early as during a subsequent sensing of sets of bits.
2 more elements
Dependencies are inferred from the claim text.