System and method for CPI load balancing in SMT processors

A computer-implemented method of scheduling threads for a plurality of simultaneous multi-threading (SMT) processors, said method comprising:

• determining that a first thread in a first run queue is a poor performing thread, wherein the first run queue corresponds to a first SMT processor, wherein the determining further includes:
• executing a plurality of threads listed in the first run queue, including the first thread, on the first SMT processor, the executing further including:
• retrieving a number of cycles value for each thread indicating the number of cycles that occurred while each thread was executing;
• retrieving a number of instructions value for each thread indicating the number of instructions that were executed while each thread was executing;
• dividing each number of cycles value by its corresponding number of instructions value, the dividing resulting in a cycles per instruction (CPI) value;
• and
• recording the CPI value for each thread in the first queue;
• and
• identifying the first thread as having a CPI value worse than a plurality of the other threads listed in the first run queue;
• and
• in response to the determination:
• writing a first identifier corresponding to the first thread to a second run queue, wherein the second run queue corresponds to a second SMT processor;
• and
• removing the first identifier from the first run queue.