Reconfigurable state machine

A reconfigurable state machine comprising a current state register, for storing a current state, and at least one programmable state entry per state of the state machine, wherein each programmable state entry is implemented as a contents addressable memory element, comprising:

• a plurality of external signal inputs;
• a tag section for storing a current state tag and at least one next state condition;
• a data section for storing a respective next state output for each of the next state conditions in the tag section;
• a next state match circuit, which compares the current state with the current state tag and compares the next state conditions with at least one of the external signal inputs;
• and
• for each next state condition in the programmable state entry:
• an input control multiplexer, which multiplexes a set of the plurality external signal inputs into a subset of the external signal inputs, wherein the subset is applied to the next state match circuit for comparison with the corresponding next state condition.

A method of configuring a state machine, the method comprising:

• providing a programmable state entry for each state of the state machine, wherein each programmable state entry comprises a current state tag register, at least one next state condition register, and at least one corresponding next state output register;
• loading the current state tag register of each state entry with a corresponding current state tag;
• loading each next state condition register with a corresponding next state condition;
• loading each next state output register with a corresponding next state output value;
• for each of the next state conditions, multiplexing a set of a plurality external signal inputs into a subset of the external signal inputs for comparison with the corresponding next state condition comparing a current state with the current state tag and each of the next conditions with the subset of the external signal inputs to produce a next state match output.

A reconfigurable state machine comprising a current state register, for storing a current state, and at least one programmable entry per state of the state machine, wherein each programmable entry comprises:

• a plurality of external signal inputs;
• a current state tag corresponding to the respective state of the state machine;
• at least one next state condition associated with the current state tag;
• a respective next state output for each of the next state conditions in the respective entry;
• a next state match circuit, which compares the current state with the current state tag and each of the next state conditions with a corresponding set of the external signal inputs to produce a next state match output;
• wherein each next state condition comprises first and second condition fields;
• wherein the corresponding set of external signal inputs comprises first and second subsets of external signal inputs;
• wherein the next state match circuit comprises, for each next state condition:
• a first exclusive-OR circuit, which compares the current state tag and the first condition field of the associated next state condition with the current state register and the first subset of the external signal inputs;
• and
• a second exclusive-OR circuit, which compares the current state tag and the second condition field of the associated next state condition with the current state register and the second subset of the external signal inputs;
• and
• wherein the match circuit comprises, for each next state condition, a logic OR circuit, which generates the next state match output from outputs of the first and second exclusive-OR circuits.