US 7,353,337 B2 · Reducing cache effects of certain code pieces

Abstract

Cache memory interrupt service routines (ISRs) influence the replacement of necessary instructions of the instruction stream they interrupt; it is known as “instruction cache washing,” since the instructions contained in the instruction cache prior to execution of the ISR are overwritten by the ISRs instructions. To reduce trashing of the instruction cache memory, the instruction cache is dynamically partitioned into a first memory portion and a second memory portion during execution. The first memory portion is for storing instructions of the current instruction stream, and the second memory portion is for storing instructions of the ISR. Thus, the ISR only affects the second memory portion and leaves instruction data stored within the first memory portion intact. This partitioning of the instruction cache reduces processor fetch operations as well as reduces power consumption of the instruction cache memory.

Claims34

Dependent claims

A method of instruction cache management comprising the steps of:

providing a first instruction cache memory;
providing first instruction data within the first instruction cache memory for execution;
providing a start of temporary cache indication, the start of temporary cache indication for initiating execution of a second program stream;
creating a temporary cache within the first instruction cache memory upon receiving the start of temporary cache indication, the temporary cache for use in caching of instruction data for use in executing of the second program stream;
executing instructions within the second program stream;
and, removing the temporary cache upon execution of an instruction for terminating execution of the second program stream.

3 more elements

Dependencies are inferred from the claim text.

Reducing cache effects of certain code pieces

Life of this patent

Reducing cache effects of certain code pieces

Life of this patent

Abstract

Claims34