Memory testing
AssigneeHewlett-Packard Development Company, L.P.
InventorsJohn MacLaren, Thomas J. Bonola, Jerry Johnson
Life of this patent
Estimating the term…
Abstract
A memory subsystem may be usable in an electronic system. The memory subsystem may comprise a memory controller and a plurality of memory modules coupled to the memory controller. The memory module may be isolated wherein transactions that target the isolated memory module can complete without loss of data and without accessing the isolated memory module, and while isolated, the memory module can be tested.
Claims17
A computer system, comprising:
- a processor running an operating system;
- and
- a memory subsystem having a redundancy and coupled to said processor, said memory subsystem comprising a memory controller and a plurality of memory modules coupled to said memory controller;
- wherein a memory module is present in the computer system but isolated wherein, using the memory subsystem's redundancy, transactions that target said isolated memory module can complete without loss of data and without accessing said isolated memory module, and while isolated, said memory module is tested by one of a system management interrupt (SMI) handler that accesses said isolated memory module via an address in I/O space that is mapped to an address in memory space that corresponds to the isolated memory module or test logic internal to the memory module.
A memory subsystem usable in an electronic system, comprising:
- a memory controller;
- and
- a plurality of hot plug memory modules that can be coupled to said memory controller and configured to provide redundancy;
- wherein a hot plug memory module may be inserted into said memory subsystem and caused to be inaccessible to an operating system and, based on the redundancy, transactions to said inserted memory module can complete without loss of data and without accessing said isolated memory module, and said inserted memory module, despite being inaccessible to the operating system, can be tested by one of a system management interrupt (SMI) handler that accesses said inserted memory module via an address that is mapped to an address corresponding to the isolated memory module or test logic internal to the inserted memory module.
A memory subsystem usable in an electronic system, comprising:
- a memory controller;
- connectors through which a plurality of hot plug memory modules can be coupled to said memory controller;
- a means for isolating a newly inserted memory module so as to preclude an operating system from causing data to be written to or read from said newly inserted memory module, yet completing transactions targeting said newly inserted memory module using redundancy of the memory subsystem, and for testing said memory module.
A method, comprising:
- inserting a hot plug memory unit into a memory subsystem having redundancy;
- isolating said hot plug memory unit so that transactions targeting said hot plug memory unit can be completed using the redundancy of the memory subsystem, but not completed to the isolated hot plug memory unit;
- and
- testing said hot plug memory unit while said hot plug memory unit is isolated, said testing performed by one of a system management interrupt (SMI) handler that accesses said inserted hot plug memory unit via an address that is mapped to an address corresponding to the inserted hot plug memory or test logic internal to the inserted hot plug memory.
Dependencies are inferred from the claim text.