Method and apparatus for segregating shared and non-shared data in cache memory banks
AssigneeQUALCOMM Incorporated
InventorsThomas Philip Speier, James Norris Dieffenderfer
Life of this patent
Estimating the term…
Loading patent…
AssigneeQUALCOMM Incorporated
InventorsThomas Philip Speier, James Norris Dieffenderfer
Estimating the term…
In a multiprocessor system, accesses to a given processor's banked cache are controlled such that shared data accesses are directed to one or more banks designated for holding shared data and/or non-shared data accesses are directed to one or more banks designated for holding non-shared data. A non-shared data bank may be designated exclusively for holding non-shared data, so that shared data accesses do not interfere with non-shared accesses to that bank. Also, a shared data bank may be designated exclusively for holding shared data, and one or more banks may be designated for holding both shared and non-shared data. An access control circuit directs shared and non-shared accesses to respective banks based on receiving a shared indication signal in association with the accesses. Further, in one or more embodiments, the access control circuit reconfigures one or more bank designations responsive to a bank configuration signal.
A method of reducing interference between shared data cache accesses related to cache snoop traffic in a multi-processor system and non-shared data cache accesses directed to data exclusive to an accessing processor for at least one bank in a banked cache, the method comprising:
A method of reducing cache access interference in a banked cache between cache accesses for shared data related to cache snoop traffic in a multi-processor system and cache accesses for non-shared data that is exclusive to an accessing processor, the method comprising:
A banked cache comprising an access control circuit configured to reduce interference between shared data cache accesses related to cache snoop traffic in a multi-processor system and non-shared data cache accesses directed to data exclusive to an accessing processor by directing cache accesses for a first type of data to one or more first cache banks of the banked cache that are designated for holding the first type of data, said first type of data being one of shared data and non-shared data.
Dependencies are inferred from the claim text.