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US 7,353,303 B2Granted
Time slot memory management in a switch having back end memories stored equal-size frame portions in stripes
AssigneeBrocade Communications Systems, Inc.
InventorsKreg A. Martin, Ronald K. Kreuzenstein
Life of this patent
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Abstract
A switch comprising front-end and back-end application specific integrated circuits (ASICs) is disclosed. Frame storage and retrieval in the switch is achieved by dividing a frame into equal sized portions that are sequentially stored in switch memory during an assigned time slot. Control logic coupled to the front-end and back-end ASICs assigns the time slot either dynamically or statically.
Claims43
A switch that comprises:
- a plurality of front-end circuits that interface to ports through which frames are transmitted and received;
- a plurality of back-end circuits that store equal-sized frame portions in stripes;
- and
- internal links from each of the front-end circuits to each of the back-end circuits,
- wherein the internal links have dynamically assigned time slots that are staggered in time between internal links from a given front-end circuit.
2 more elements
A method comprising:
- receiving equal-sized portions of a frame;
- storing the portions in one or more buffer lines that span multiple memory modules;
- dynamically allocating to the portions a time slot on multiple internal links that couple the memory modules to an egress port;
- and
- transferring the equal-sized portions to an egress port using a dynamically allocated time slot.
2 more elements
A Fibre Channel (FC) fabric comprising:
- multiple FC switches coupled together,
- wherein at least one of the FC switches is configured to receive equal-sized portions of a frame, store the portions in one or more buffer lines that span multiple memory modules, and dynamically allocate to the portions a time slot on multiple internal links that couple the memory modules to an egress port.
A network comprising:
- at least two nodes;
- and
- a Fibre Channel (FC) fabric coupling the nodes,
- wherein the fabric comprises at least one switch that is configured to receive equal-sized portions of a frame, store the portions in one or more buffer lines that span multiple memory modules, and dynamically allocate to the portions a time slot on multiple internal links that couple the memory modules to an egress port.
1 more element
Dependencies are inferred from the claim text.