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US 7,353,288 B1Granted
SONET/SDH payload re-mapping and cross-connect
AssigneeCiena Corporation
InventorsVenkata Rangavajjhala, Venkata Kalapatapu
Life of this patent
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Abstract
Multiple frames of SDH framed data are received. Each frame has an overhead portion and a payload portion. The payload portions of multiple frames are identified and extracted. These payloads are switched and re-mapped to a different STM structure as required.
Claims18
An apparatus to remap SONET/SDH payloads from a received STS/STM frame structure to a destination STS/STM frame structure, comprising:
- a plurality of cards coupled via a backplane, the plurality of cards comprising:
- a plurality of cross-connect cards, wherein the plurality of cross-connect cards comprise at least one working card and at least one protection card;
- a plurality of trunk interface cards, wherein the trunk interface cards provide an interface to one or more other devices using higher speed connections;
- and
- a plurality of tributary interface cards coupled to the plurality of trunk interface cards via the plurality of cross-connect cards, wherein the tributary interface cards provide an interface to one or more other lower speed devices;
- a buffer memory coupled to receive a payload portion of the received SONET/SDH framed data;
- a pointer generator coupled to the buffer memory, the pointer generator to operate in a time-sliced manner to generate the destination STS/STM frame structure with aligned, remapped payload;
- and
- a pointer interpreter coupled to the buffer memory that operates in a time sliced manner to identify overhead portions of the SONET/SDH framed data and a payload portion of the SONET/SDH framed data, the pointer interpreter comprising:
- a first level pointer interpreter that operates in a time sliced manner;
- a first memory coupled to the first level pointer interpreter the first memory to store data for the first level pointer interpreter:
- a second level pointer interpreter coupled to the first level pointer interpreter, the second level pointer interpreter to operate in a time sliced manner;
- and
- a second memory coupled to the second level pointer interpreter, the second memory to store data for the second level pointer interpreter;
- wherein the buffer memory and pointer generator are located within the plurality of cross-connect cards;
- wherein the first level pointer interpreter is configured to extract VC-4, TUG-structured VC-3, and non-TUG structured VC-3 payloads;
- and
- wherein the second level pointer interpreter is configured to process VC-4 and TUG-structured VC-3 payloads from the first level pointer interpreter and to extract low-order payloads in a format of VC-3 VC-2 VC-12, VC-11, and combinations thereof.
15 more elements
A method, comprising:
- providing a plurality of cards coupled via a backplane, the plurality of cards comprising:
- a plurality of cross-connect cards, wherein the plurality of cross-connect cards comprise at least one working card and at least one protection card;
- a plurality of trunk interface cards, wherein the trunk interface cards provide an interface to one or more other devices using high speed connections;
- and
- a plurality of tributary interface cards coupled to the plurality of trunk interface cards via the plurality of cross-connect cards, wherein the tributary interface cards provide an interface to one or more other lower speed devices;
- receiving multiple STS/STM frames of SONET/SDH data, each frame having an overhead portion and a payload portion;
- identifying a portion of a first level overhead associated with the SONET/SDH framed data;
- storing state information related to the first level overhead;
- identifying a portion of a second level overhead associated with the SONET/SDH framed data;
- storing state information related to the second level overhead;
- identifying the payload portion of the multiple frames;
- generating a plurality of aligned pointers in a time sliced manner, the pointers for use as overhead for the payload portions of the multiple frames when the payload portions are transmitted to an external destination, wherein generating a plurality of aligned pointers comprises a first level pointer interpreter configured to extract VC-4, TUG-structured VC-3, and non-TUG structured VC-3 payloads, and a second level pointer interpreter configured to process VC-4 and TUG-structured VC-3 payloads from the first level pointer interpreter and to extract low-order payloads in a format of VC-3, VC-2, VC-12, VC-11, and combinations thereof;
- and
- remapping the payload portions from a first frame structure of the received STS/STM frames to a second frame structure based on the generated pointers;
- wherein the identifying the overhead, identifying the payload, generating, and remapping steps are performed by the plurality of cross-connect cards.
12 more elements
A network switching component, comprising:
- a plurality of cards coupled via a backplane, the plurality of cards comprising:
- a plurality of cross-connect cards, wherein the plurality of cross-connect cards comprise at least one working card and at least one protection card;
- a plurality of trunk interface cards, wherein the trunk interface cards provide an interface to one or more other devices using high speed connections;
- and
- a plurality of tributary interface cards coupled to the plurality of trunk interface cards via the plurality of cross-connect cards, wherein the tributary interface cards provide an interface to one or more other lower speed devices;
- an input network interface coupled to receive SONET/SDH framed data having a received STS/STM frame structure from an external source;
- a pointer interpreter coupled to the input network interface, the pointer interpreter to identify overhead and payload portions of the received SONET/SDH framed data, the pointer interpreter comprising:
- a first level pointer interpreter that operates in a time sliced manner;
- a first memory coupled to the first level pointer interpreter, the first memory to store data for the first level pointer interpreter;
- a second level pointer interpreter coupled to the first level pointer interpreter, the second level pointer interpreter to operate in a time sliced manner;
- and
- a second memory coupled to the second level pointer interpreter, the second memory to store data for the second level pointer interpreter;
- a memory coupled to the pointer interpreter, the memory to store the payload portion of the received SONET/SDH framed data;
- a pointer generator coupled to the memory, the pointer generator to generate a plurality of aligned pointers for use as an overhead portion of a remapped SONET/SDH framed data having a destination STS/STM frame structure;
- and
- an output network interface coupled to the pointer generator, the output network interface to output the remapped SONET/SDH framed data;
- wherein the memory, pointer interpreter, and pointer generator are located within the plurality of cross-connect cards;
- wherein the first level pointer interpreter is configured to extract VC-4, TUG-structured VC-3, and non-TUG structured VC-3 payloads;
- and
- wherein the second level pointer interpreter is configured to process VC-4 and TUG-structured VC-3 payloads from the first level pointer interpreter and to extract low-order payloads in a format of VC-3, VC-2, VC-12, VC-11, and combinations thereof.
17 more elements
Dependencies are inferred from the claim text.