Frame mapping scheduler with compressed mapping table

A method for use in a processing device of a communication system, the method comprising:

• scheduling data blocks for transmission from a plurality of transmission elements, utilizing a mapping table;
• the mapping table comprising at least one entry specifying a mapping between a particular timeslot of the frame and a particular one of the transmission elements;
• a particular transmission element to be scheduled in a given timeslot being determined by accessing a corresponding mapping table entry to identify the particular transmission element;
• the mapping table being stored in a compressed format, as a compressed mapping table in which a particular compressed mapping table entry identifies one of a plurality of stored values which is processed to determine a corresponding uncompressed mapping table entry.

An integrated circuit comprising:

• a processing device having scheduling circuitry configured to schedule data blocks for transmission from a plurality of transmission elements in timeslots of a frame, utilizing at least a mapping table;
• the mapping table comprising at least one entry specifying a mapping between a particular timeslot of the frame and a particular one of the transmission elements;
• the scheduling circuitry being further configured to determine a particular transmission element to be scheduled in a given timeslot by accessing a corresponding mapping table entry to identify the particular transmission element;
• wherein the mapping table is stored in a compressed format in memory circuitry associated with the scheduling circuitry;
• the mapping table being stored as a compressed mapping table in which a particular entry identifies one of a plurality of stored values which is processed to determine a corresponding uncompressed mapping table entry.