Method and apparatus for increasing yield in a memory circuit
AssigneeInternational Business Machines Corporation
InventorsMark Curtis Hayes Lamorey, Yu Lu, Janusz Jozef Nowak
Life of this patent
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Abstract
Apparatus for repairing one or more shorted memory cells in a memory circuit includes control circuitry. The control circuitry is operative in one of at least a first mode and a second mode. In the first mode, the control circuitry is operative to apply a first signal to a selected memory cell in the memory circuit for reading a logic state of the selected memory cell and to determine whether or not the selected memory cell is shorted. In the second mode, the control circuitry is operative to apply a second signal to a selected memory cell which has been determined to be shorted for initiating a repair of the selected memory cell, the second signal being greater in magnitude than the first signal.
Claims15
A method for repairing one or more shorted memory cells in a memory circuit, the method comprising the steps of:
- setting a signal to be applied to a selected memory cell in the memory circuit to a first value;
- setting a current address to a value corresponding to a current selected memory cell in the memory circuit;
- reading a logic state of the current selected memory cell with the signal at the first value and determining whether or not the current selected memory cell is shorted;
- when the current selected memory cell is determined to be shorted, initiating a repair of the shorted memory cell, and repeating the steps of reading the logic state of the current selected memory cell and determining whether or not the selected memory cell is shorted;
- and
- when the current selected memory cell is determined to be not shorted, setting the current address to a value corresponding to a new current selected memory cell which has not been previously read, and repeating the steps of reading the logic state of the current selected memory cell and determining whether or not the selected memory cell is shorted.
A method for repairing one or more shorted memory cells in a memory circuit, the method comprising the steps of:
- setting a signal to be applied to a selected memory cell in the memory circuit to a first value;
- setting a current address to a value corresponding to a current selected memory cell in the memory circuit;
- reading a logic state of the current selected memory cell with the signal at the first value and determining whether or not the current selected memory cell is shorted;
- when the current selected memory cell is determined to be shorted, storing the current address corresponding to the shorted memory cell;
- setting the current address to a value corresponding to a new current selected memory cell which has not been previously read, and repeating the steps of reading the logic state of the current selected memory cell and determining whether or not the selected memory cell is shorted;
- when at least one address corresponding to a shorted memory cell has been stored, initiating a repair of the shorted memory cell.
Dependencies are inferred from the claim text.