Non-volatile semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorsRiichiro Shirota, Kikuko Sugimae
Life of this patent
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Abstract
A memory cell has a selection transistor constituted of an MOS transistor having a gate electrode and a cell transistor constituted of an MOS transistor having the same polarity as the selection transistor, in such a configuration that these two transistors are connected in series. A bit line is connected to a drain region of the selection transistor and a word line is connected to the gate electrode thereof. A gate electrode of the cell transistor is not electrically connected anywhere so as to be in a floating potential state, while a drain region thereof is connected to a source region of the selection transistor. A source line is connected to a source region of the cell transistor.
Claims18
A non-volatile semiconductor memory device comprising:
- a selection transistor constituted of an MOS transistor having a gate electrode;
- a bit line connected to one end of the selection transistor;
- a word line connected to the gate electrode of the selection transistor;
- and
- a cell transistor having a control gate electrode which is not electrically connected anywhere so as to be in a floating potential state, one end of the cell transistor being connected to the other end of the selection transistor, the cell transistor being constituted of a MOS transistor having the same polarity as the selection transistor;
- and a source line connected to the other end of the cell transistor, wherein
- in erasing data stored in the cell transistor, the source line is provided with a first voltage, the word line is supplied with a second voltage, and the bit line is supplied with a third voltage, and
- each of the first and second voltages is a voltage of positive polarity, and the third voltage is a ground voltage.
A non-volatile semiconductor memory device comprising:
- a selection transistor constituted of an MOS transistor having a gate electrode;
- a bit line connected to one end of the selection transistor;
- a word line connected to the gate electrode of the selection transistor;
- and
- a cell transistor having a control gate electrode which is not electrically connected anywhere so as to be in a floating potential state, one end of the cell transistor being connected to the other end of the selection transistor, the cell transistor being constituted of a MOS transistor having the same polarity as the selection transistor;
- and a source line connected to the other end of the cell transistor, wherein
- in erasing data stored in the cell transistor, the source line is provided with a first voltage, the word line is supplied with a second voltage, and the bit line is supplied with a third voltage, and
- each of the first, second and third voltages is a voltage of positive polarity and the third voltage is lower than the first and second voltages.
A non-volatile semiconductor memory device comprising:
- a selection transistor constituted of an MOS transistor having a gate electrode;
- a bit line connected to one end of the selection transistor;
- a word line connected to the gate electrode of the selection transistor;
- and
- a cell transistor having a control gate electrode which is not electrically connected anywhere so as to be in a floating potential state, one end of the cell transistor being connected to the other end of the selection transistor, the cell transistor being constituted of a MOS transistor having the same polarity as the selection transistor;
- and a source line connected to the other end of the cell transistor, wherein
- the data is read from the cell transistor, the source line is supplied with a first voltage, the word line is supplied with a second voltage, the bit line is supplied with a third voltage, and
- the first voltage is a ground voltage, the second voltage is a voltage of positive polarity, and the third voltage is a voltage of positive polarity which is higher than the first voltage and lower than the second voltage.
Dependencies are inferred from the claim text.