Electrode-wiring substrate and display device

An electrode-wiring substrate comprising:

• an insulating substrate;
• a plurality of adjacent gate electrode wires which is formed on the insulating substrate;
• a plurality of adjacent source electrode wires which intersects with the plurality of adjacent gate electrode wires;
• an insulating layer which electrically insulates the plurality of adjacent gate electrode wires from the plurality of adjacent source electrode wires;
• a plurality of switching elements, where each of the plurality of switching elements is arranged near a corresponding intersection of one of the plurality of adjacent gate electrode wires and one of the plurality of adjacent source electrode wires;
• a display region which includes a plurality of pixel electrodes, where each of the plurality of pixel electrodes is connected to a corresponding one of the plurality of switching elements;
• a plurality of gate electrode terminals which is arranged at the periphery of the display region such that each of the plurality of gate electrode terminals is arranged to input signals to a corresponding one of the plurality of adjacent gate electrode wires;
• a plurality of source electrode terminals which is arranged at the periphery of the display region such that each of the plurality of source electrode terminals is arranged to input signals to a corresponding one of the plurality of adjacent source electrode wires;
• a plurality of gate routing wires is arranged at the periphery of the display region such that each of the plurality of gate routing wires is arranged to connect a corresponding one of the plurality of adjacent gate electrode wires to a corresponding one of the plurality of gate electrode terminals;
• and
• a plurality of source routing wires is arranged at the periphery of the display region such that each of the plurality of source routing wires is arranged to connect a corresponding one of the plurality of adjacent source electrode wires to a corresponding one of the plurality of source electrode terminals;
• wherein
• the plurality of gate routing wires and/or the plurality of source routing wires include:
• a first plurality of routing wires which are made of gate material for forming the gate electrode wires;
• and
• a second plurality of routing wires which are electrically insulated from the first routing wires by the insulating layer and which are made of source material for forming the source electrode wires;
• the first plurality of routing wires and the second plurality of routing wires are alternately arranged so as not to coincide with each other when viewed in plan;
• the insulating layer includes at least a plurality of corresponding pairs of a first connection hole and a second connection hole;
• and
• the plurality of adjacent gate electrode wires, the plurality of gate electrode terminals, the plurality of adjacent source electrode wires, the plurality of source electrode terminals, and the corresponding pairs of a first connection hole and a second connection hole are arranged such that:
• each of the plurality of adjacent gate electrode wires is connected to a corresponding one of the plurality of gate electrode terminals via at least one of the corresponding pairs of a first connection hole and a second connection hole;
• and/or
• each of the plurality of adjacent source electrode wires is connected to a corresponding one of the plurality of source electrode terminals via at least one of the corresponding pairs of a first connection hole and a second connection hole.