Indirect addressing mode for display controller

Abstract

A display controller is provided. The display controller is configured to provide an indirect addressing mode to access a memory location within the display controller. The display controller includes a first pin configured to enable access to one of a register of the display controller or a memory region of the display controller based upon a logical level of a first signal received by the first pin. A second pin is included. The second pin is configured to define the access to the register or the memory region as one of address information or data based upon a logical level of a second signal received by the second pin. The display controller includes an extra pin mode module configured to enable the first signal to select the data to access memory without accessing a register block. A device and methods for implementing an indirect addressing mode is also provided.

Dependencies are inferred from the claim text.