Absolute position detector
AssigneeOkuma Corporation
InventorYasukazu Hayashi
Life of this patent
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Abstract
An absolute position detector for accurately reading a code recorded on an absolute track is provided. Output signals from sensors that read a code recorded on an absolute track are input into a binarization processor. A compensator provided within the binarization processor functions to correct and determine the value of a read target bit based on an output signal from a read sensor which is the sensor located closest to the center of the one-bit width of the read target bit, and an output signal from a compensation sensor, which is a sensor separated from the read sensor by a distance within the range from λ/2 to 3·λ/2.
Claims6
An absolute position detector which detects an absolute position of a moving movable member positioned opposing a fixed member, wherein:
- one of the fixed member and the movable member comprises an absolute track having a pattern of numerical sequence composed of binary numbers recorded at a bit pitch of λ, the pattern forming different codes of consecutive N bits depending on read positions;
- the other of the fixed member and the movable member comprises a plurality of sensors positioned opposing the absolute track for reading values of at least N consecutive bits;
- and
- the absolute position detector comprises a bit value determination circuit that determines a bit value of a read target bit based on an output signal from a read sensor located closest to center of a one-bit width of the read target bit, and an output signal from a compensation sensor which is a sensor, among the plurality of sensors, which is located apart from the read sensor by a distance within a range from λ/2 to 3·λ/2.
An absolute position detector which detects an absolute position of a moving movable member positioned opposing a fixed member, wherein:
- one of the fixed member and the movable member comprises an absolute track having a pattern of numerical sequence composed of binary numbers recorded at a bit pitch of λ, the pattern forming different codes of consecutive N bits depending on read positions;
- the other of the fixed member and the movable member comprises a plurality of sensors positioned opposing the absolute track for reading values of at least N consecutive bits;
- and
- the absolute position detector comprises a bit value determination circuit that determines a bit value of a read target bit based on an output signal from a read sensor located closest to center of a one-bit width of the read target bit, and a sum of output signals from the plurality of sensors.
An absolute position detector which detects an absolute position of a moving movable member positioned opposing a fixed member, wherein:
- one of the fixed member and the movable member comprises an absolute track having a pattern of numerical sequence composed of binary numbers recorded at a bit pitch of λ, the pattern forming different codes of consecutive N bits depending on read positions, the one of the fixed member and the movable member further comprising an incremental track having recorded thereon a pattern which repeats in a cycle of an integer multiple of the bit pitch λ;
- the other of the fixed member and the movable member comprises a plurality of sensors positioned opposing the absolute track for reading values of at least N consecutive bits, and an incremental sensor positioned opposing the incremental track for reading an absolute position within the bit pitch λ;
- the absolute position detector comprises a sensor selector for selecting, based on information on the absolute position within the bit pitch λ obtained from an output signal of the incremental sensor, two sensor signals acquired from positions closest to center of a one-bit width of a read target bit;
- and
- the absolute position detector further comprises a bit value determination circuit that determines a bit value of the read target bit by estimating, based on the two selected sensor signals, a virtual sensor output signal from the center of the one-bit width of the read target bit.
Dependencies are inferred from the claim text.