Phase locked loop circuits, offset PLL transmitters, radio frequency integrated circuits and mobile phone systems

A radio frequency integrated circuit having a synthesizer block including a PLL transmitter,

• wherein said PLL transmitter comprises:
• a first voltage locked oscillator;
• a first circuit for frequency conversion with which the output of said first voltage locked oscillator is connected;
• a first phase detector, with whose first input, the output of said first circuit for frequency conversion is connected, and with whose second input a first reference signal is connected;
• a first charge pump circuit, with which the output of said first phase detector is connected;
• and
• a first loop filter, with which the output of said first charge pump circuit is connected,
• wherein to said second input of said first phase detector, a first signal source for detecting the loop characteristics is configured to be able to be connected, whose frequency is variable and whose divided frequency can be configured to be at a varied frequency,
• wherein said PLL transmitter further comprises:
• a first counter which is connected with the output side of said first voltage locked oscillator;
• a first integrator which is connected with the output of said first counter;
• and
• a controller which detects the loop characteristics based on the result of detection of said first integrator and performs feedback of the result of detection on the value of said charge pump current,
• wherein said first voltage locked oscillator is located at a first corner of a semiconductor chip whose planar configuration is virtually rectangle,
• wherein said first circuit for frequency conversion is located at a second corner of said semiconductor chip, and
• wherein said first counter, said first integrator and said controller are located between said first voltage locked oscillator and said first circuit for frequency conversion.