Semiconductor integrated circuit device
AssigneeRenesas Technology Corp.
InventorHiroyuki Mizuno
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit device for fast and low power operations, comprising a plurality of circuit blocks of a chip, each of which has a plurality of states with different power consumption values. A power management circuit determines the state of each of the circuit blocks so as not to exceed a maximum power consumption value of the semiconductor integrated circuit device by considering the power consumption of each circuit block and by each state transition in each circuit block. The maximum power consumption value may be preset or adjustable after fabrication.
Claims13
A semiconductor integrated circuit device comprising:
- a plurality of circuit blocks, each of the plurality of circuits blocks having operating states which include at least a first state and a second state;
- and
- a power management block including a memory which stores a maximum chip power, said maximum chip power being referred when one of the operating states for each of the plurality of circuit blocks is determined,
- wherein each of the plurality of circuit blocks operates according to a respective function thereof in the first state and stops operating in the second state,
- wherein the power management block changes the maximum chip power according to a temperature of the semiconductor integrated circuit device and determines one of the operating states for each of the plurality of circuit blocks so as not to exceed the maximum chip power.
A semiconductor integrated circuit device comprising:
- a plurality of circuit blocks, each of the plurality of circuits blocks having operating states which include at least a first state and a second state;
- and
- a power management block including a memory which stores a maximum chip power, said maximum chip power being referred when one of the operating states for each of the plurality of circuit blocks is determined,
- wherein each of the plurality of circuit blocks operates at a lower frequency in the first state than in the second state,
- wherein the power management block changes the maximum chip power according to a temperature of the semiconductor integrated circuit device and determines one of the operating states for each of the plurality of circuit blocks so as not to exceed the maximum chip power.
Dependencies are inferred from the claim text.