Method and apparatus of a level shifter circuit with duty-cycle correction
AssigneeTexas Instruments Incorporated
InventorsShahid Ali, Sujan Manohar, Satheesh Balasubramanian
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AssigneeTexas Instruments Incorporated
InventorsShahid Ali, Sujan Manohar, Satheesh Balasubramanian
Estimating the term…
A method and/or a system of control signal synchronization of a scannable storage circuit is disclosed. In one embodiment, a system includes a first circuit to operate based on a first voltage of a first power supply, a second circuit to operate based on a second voltage of a second power supply, a level shifter circuit between the first circuit and the second circuit to translate between the first voltage of the first power supply and the second voltage of the second power supply, and a n-channel metal-oxide semiconductor field-effect transistor (nMOSFET) having a gate input of the second voltage and serially coupled in a fall path of the level shifter circuit to increase a rate of a capacitive discharge such that the rate of a capacitive discharge charge is substantially equal to a rate of a capacitive charge (e.g., the fall delay may also increase a bit because of an extra transistor).
A system, comprising:
A level shifter circuit, comprising:
A method, comprising:
Dependencies are inferred from the claim text.