Delay circuit having a capacitor and having reduced power supply voltage dependency
AssigneeFujitsu Limited
InventorHiroyoshi Tomita
Life of this patent
Estimating the term…
Abstract
A delay circuit includes: an input signal line (IN) through which an input signal is inputted; a capacitor (106) charged with and discharging electric charge; a first switch (101) connected to the input signal line and operating according to the input signal when the capacitor is to be charged with electric charge; a second switch (102) connected to the input signal line and operating according to the input signal when the electric charge is to be discharged from the capacitor; and a comparison circuit (107) comparing a voltage of the capacitor and a reference voltage to output a delay signal of the input signal.
Claims20
A semiconductor device comprising:
- an input signal line through which a digital input signal is inputted;
- a capacitor charged with and discharging electric charge;
- a first switch connected to said input signal line and operating according to the digital input signal when said capacitor is to be charged with electric charge;
- a second switch connected to said input signal line and operating according to the digital input signal when the electric charge is to be discharged from said capacitor;
- a comparison circuit comparing a voltage of said capacitor and a reference voltage to output a delay signal of the digital input signal;
- and
- a reset circuit setting a level of an output signal line of said comparison circuit according to the digital input signal and the delay signal.
A semiconductor device comprising:
- an input signal line through which a digital input signal is inputted;
- a capacitor charged with and discharging electric charge;
- a first switch connected to said input signal line and operating according to the digital input signal when said capacitor is to be charged with electric charge;
- a second switch connected to said input signal line and operating according to the digital input signal when the electric charge is to be discharged from said capacitor;
- a comparison circuit comparing a voltage of said capacitor and a reference voltage to output a delay signal of the digital input signal;
- a constant current source discharging the electric charge from said capacitor with a constant electric current according to the operation of said second switch;
- and
- a resistor connected between said capacitor and said constant current source.
Dependencies are inferred from the claim text.