US 7,352,197 B1Granted

Octal/quad site docking compatibility for package test handler

AssigneeXilinx, Inc.

InventorsMohsen Hossein Mardi, David M. Mahoney

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Abstract

A test system configuration is provided to enable testing of integrated circuit (IC) packages. The test system includes a test controller, an interface apparatus including a PC board with lines connecting the test controller to contact areas for contacting the IC packages and a handler for supporting the IC chips and interface apparatus to maintain electrical connections during testing. The handler includes docking plates for attaching to the PC board to provide a guide for the IC packages that are inserted in openings of the docking plates to align contacts of the IC packages and PC board. The docking plates are configured to provide quad (four) and octal (eight) test sites, with either the quad or octal docking plate mating to the same PC board and being supported in the same handler system. An alignment frame for mounting either the quad or octal docking plate is further provided as part of the handler.

Claims13

Dependent claims

A system for testing integrated circuit (IC) packages comprising:

a quad site docking plate having four openings for alignment of the IC packages;
an octal site docking plate having eight openings for alignment of the IC packages;
the quad site docking plate and the octal site docking plate being interchangeable for being separately mated with a printed circuit (PC) board, the PC board supporting attachments areas for separately mating with attachment areas of either the quad site docking plate or the octal site docking plate when in use so that the openings of either the quad site docking plate or the octal site docking plate fit around electrical contact sites of the PC board for mating with contacts on the IC packages held by either the quad site docking plate or the octal site docking plate, respectively, when in use;
the PC board having traces associated with the electrical contact sites for testing the IC packages held in either the quad site docking plate or the octal site docking plate, respectively, when in use;
a first number of the IC packages being four and being capable of placement respectively into the four openings of the quad site docking plate facilitated by first slanted walls for allowing alignment by sliding of the first number of the IC packages respectively into the four openings of the quad site docking plate;
and
when interchanging quad site docking plate for the octal site docking plate, a second number of the IC packages being eight and being capable of placement into the eight openings of the octal site docking plate facilitated by second slanted walls for allowing alignment by sliding of the second number of the IC packages respectively into the eight openings of the octal site docking plate;
and
the first slanted walls associated with the openings of the quad site docking plate by comparison being approximately orthogonal to the second slanted walls associated with the openings of the octal site docking plate with respect to separate placements of the quad site docking plate and the octal site docking plate in a frame.

6 more elements

A system for testing integrated circuit (IC) packages comprising:

a first docking plate having a first number of openings for alignment of the IC packages;
a second docking plate having a second number of openings for alignment of the IC packages, wherein the second number is greater than the first number;
the first docking plate and the second docking plate being interchangeable for being separately mated with a printed circuit (PC) board, the PC board supporting attachments areas for separately mating with attachment areas of either the first docking plate or the second docking plate so that the openings of either the first docking plate or the second docking plate fit around electrical contact sites of the PC board for mating with contacts on the IC packages held by the either the first docking plate or the second docking plate, respectively, when in use;
a first number of the IC packages capable of being placed into the first number of the openings of the first docking plate facilitated by first slanted walls for allowing alignment by sliding of the first number of the IC packages into the first number of openings of the first docking plate;
when interchanging the first docking plate for the second docking plate, a second number of the IC packages capable of being placed into the second number of the openings of the second docking plate facilitated by second slanted walls for allowing alignment by sliding of the second number of the IC packages into the second number of openings of the second docking plate;
the first slanted walls associated with the openings of the first docking plate and by comparison being approximately orthogonal to the second slanted walls associated with the openings of the second docking plate with respect to separate placements of the first docking plate and the second docking plate in a frame;
and
the PC board having traces associated with the electrical contact sites for testing the IC packages held in either the first docking plate or the second docking plate, respectively, when in use.

5 more elements

A method for testing integrated circuit (IC) packages comprising:

mounting a frame on a printed circuit (PC) board, the PC board having electrical contact sites for mating with contacts on the IC packages, wherein the contacts sites on the PC board are connected by traces in the PC board for electrical continuity with the contacts on the IC packages for the testing thereof;
placing a first docking plate having a first number of openings for alignment with an equivalent number of the IC packages in the frame to the first number of the electrical contact sites on the PC board for the testing;
and
interchanging the first docking plate for a second docking plate in the frame, the second docking plate having a second number of openings different than the first number of openings, the second number of openings for alignment with an equal number of the IC packages to the second number of the electrical contact sites on the PC board;
placing a first number of the IC packages into the first number of the openings of the first docking plate facilitated by first slanted walls for allowing alignment by sliding of the first number of the IC packages into the first number of openings of the first docking plate;
after interchanging the first docking plate for the second docking plate, placing a second number of the IC packages into the second number of the openings of the second docking plate facilitated by second slanted walls for allowing alignment by sliding of the second number of the IC packages into the second number of openings of the second docking plate;
and
the first slanted walls associated with the openings of the first docking plate and by comparison being approximately orthogonal to the second slanted walls associated with the openings of the second docking plate with respect to separate placements of the first docking plate and the second docking plate in the frame.

5 more elements

Dependencies are inferred from the claim text.