US 7,352,068 B2Granted

Multi-chip module

AssigneeRenesas Technology Corp.

InventorsHiroshi Kuroda, Makoto Tetsuka

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Abstract

A multi-chip module is provided which allows memory space extension to improve function and performance. A first semiconductor chip is mounted on a mounting substrate, and a first semiconductor memory chip is mounted over the first semiconductor chip. A second semiconductor memory chip having the same circuitry and the same memory capacity as the first semiconductor memory chip is mounted on a spacer formed on the first memory chip in the same direction as the first semiconductor memory chip. An electrode is independently formed corresponding to a bonding pad to which a selective signal of the first semiconductor memory chip and the second semiconductor memory chip is supplied. A plurality of electrodes are formed in common corresponding to a plurality of bonding pads to which the same signal is respectively supplied except for the selective signal.

Claims8

Dependent claims

A multi-chip module, comprising:

a first semiconductor chip surface-mounted on a surface of a mounting substrate;
a second semiconductor chip mounted back-to-back over the first semiconductor chip, and having a bonding pad in a periphery portion thereof;
a first semiconductor memory chip mounted, via a first spacer, over the first semiconductor chip, and having a bonding pad formed in a periphery portion on a surface of the first semiconductor memory chip;
a second semiconductor memory chip mounted via a second spacer over the first semiconductor memory chip, and in the same direction as the first semiconductor chip, said second semiconductor chip containing the same circuitry with the same memory capacity as that of the first semiconductor memory chip,
wherein the second spacer is mounted over a part of the surface of the first semiconductor memory chip where the bonding pad is not formed;
an electrode independently formed on the mounting substrate surface part corresponding to a bonding pad to which a selective signal of the first semiconductor memory chip and the second semiconductor memory chip is supplied;
and
a plurality of electrodes formed on the mounting substrate surface part in common corresponding to a plurality of bonding pads to which the same signal is respectively supplied except for the selective signal;
and
wherein die bond films which adhere the first semiconductor memory chip and the second semiconductor memory chip respectively to surfaces of the first spacer and the second spacer are disposed on back surfaces of the first semiconductor memory chip and the second semiconductor memory chip, the back surface of the first semiconductor memory chip and of the second semiconductor memory chip being electrically insulated,
wherein a thickness of the first semiconductor memory chip and the second semiconductor memory chip is thickly formed rather than the first semiconductor chip or the second semiconductor chip, and
wherein the first semiconductor chip is a semiconductor chip including a microprocessor,
the second semiconductor chip is a memory chip which can erase electrically, and records memory information in a nonvolatile memory cell, and
the first and second semiconductor memory chips are memory chips which store memory information in a dynamic type memory cell, respectively.

11 more elements

A multi-chip module, comprising:

a first semiconductor chip surface-mounted on a surface of a mounting substrate;
a second semiconductor chip mounted back-to-back over the first semiconductor chip, and having bonding pads in a periphery portion thereof;
a first semiconductor memory chip mounted, via a first spacer, over the first semiconductor chip, and having bonding pads formed in a periphery portion on a surface of the first semiconductor memory chip;
a second semiconductor memory chip mounted via a second spacer over the first semiconductor memory chip, and in the same direction as the first semiconductor chip, said second semiconductor chip containing the same circuitry with the same memory capacity as that of the first semiconductor memory chip,
wherein the second spacer is mounted over a part of the surface of the first semiconductor memory chip where the bonding pads are not formed;
an electrode independently formed on the mounting substrate surface part corresponding to a bonding pad to which a selective signal of the first semiconductor memory chip and the second semiconductor memory chip is supplied;
and
a plurality of electrodes formed on the mounting substrate surface part in common corresponding to a plurality of bonding pads to which the same signal is respectively supplied except for the selective signal;
and
wherein die bond films which adhere the first semiconductor memory chip and the second semiconductor memory chip respectively to surfaces of the first spacer and the second spacer are disposed on back surfaces of the first semiconductor memory chip and the second semiconductor memory chip, the back surface of the first semiconductor memory chip and of the second semiconductor memory chip being electrically insulated,
wherein the first semiconductor chip is a semiconductor chip including a microprocessor,
the second semiconductor chip is a memory chip including nonvolatile memory cells for electrically erasing, and recording memory information, and
the first and second semiconductor memory chips are memory chips including dynamic type memory cells for storing information, respectively.

10 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/290,470Filed 1 Dec 2005
Priority: JP 2004-3490161 Dec 2004
Published: US 2006/0113677 A11 Jun 2006
Granted: 1 Apr 2008
Term ends: Not estimatedThe source records don’t support an estimate.

Classification17 codes

H10W 76/42
Fillings or auxiliary members in containers, e.g. centering rings: fillings
H10W 74/117
By a substrate and the encapsulations: the substrate having spherical bumps for external connection
H10W 90/00
Package configurations
H10W 72/5449
Dispositions of bond wires: not being orthogonal to a side surface of the chip, e.g. fan-out arrangements