Flexible core for enhancement of package interconnect reliability
AssigneeIntel Corporation
InventorsMitul B. Modi, Patricia A. Brusso, Ruben Cadena, Carolyn R. McCormick, Sankara J. Subramanian
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AssigneeIntel Corporation
InventorsMitul B. Modi, Patricia A. Brusso, Ruben Cadena, Carolyn R. McCormick, Sankara J. Subramanian
Estimating the term…
An IC package is disclosed that comprises a core region disposed between upper and lower build-up layer regions. In one embodiment, the core region comprises a low modulus material. In an alternative embodiment the core region comprises a medium modulus material. In an alternative embodiment, the core material is selected based upon considerations such as its modulus, its coefficient of thermal expansion, and/or the resulting total accumulated strain. In an alternative embodiment, boundaries with respect to the softness of the core material are established by considering the relative density in opposing conductive build-up layers above and below the core region.
A semiconductor package substrate comprising:
An apparatus that includes a semiconductor package, the semiconductor package comprising a core region disposed between first and second build-up layer regions, wherein the core region includes a material having a modulus of elasticity less than approximately 5 Giga Pascals.
Dependencies are inferred from the claim text.