Process for producing high performance interconnects
AssigneeHRL Laboratories, LLC
InventorsPeter D. Brewer, Carl W. Pobanz
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AssigneeHRL Laboratories, LLC
InventorsPeter D. Brewer, Carl W. Pobanz
Estimating the term…
A method for fabricating high performance vertical and horizontal electrical connections in a three dimensional semiconductor structure. A dielectric film is imprinted with a stamp pattern at high vacuum and with precise temperature and stamping pressure control. The stamp pattern may be formed on a substrate using semiconductor fabrication techniques. After the dielectric film is stamped, residual dielectric film is removed to allow access to an underlying layer. Via and trench regions formed within the dielectric film by stamping are then metalized to provide the high performance interconnections. Multiple layers of interconnections in the three dimensional structure are provided by stacking layers of stamped and metalized dielectric films on top of each other.
A method for producing electrical interconnections in a three dimensional semiconductor structure, comprising the steps of:
A method for producing high performance electrical interconnections in a three dimensional semiconductor structure, comprising the steps of:
A method for forming coplanar interconnects between layers in a multiple layer three dimensional structure, the method comprising:
A method for forming a coaxial connection between layers in a multiple layer three dimensional structure, the method comprising:
A method for forming shielded horizontal transmission line interconnections between layers in a multiple layer three dimensional structure, the method comprising:
Dependencies are inferred from the claim text.