Method of fabricating semiconductor device using selective epitaxial growth

A method of fabricating a semiconductor device comprising a first transistor and a second transistor vertically stacked above the first transistor, the method comprising:

• forming the first transistor gate structure associated with the first transistor on a silicon substrate;
• forming an interlayer insulating layer on the first gate structure;
• forming a seed window through the interlayer insulating layer to expose a portion of the substrate;
• performing a selective epitaxial growth (SEG) process on the substrate to form a single crystal silicon SEG layer up through the seed window using the exposed portion of the substrate as a seed;
• depositing an amorphous silicon layer on the interlayer insulating layer and in contact with the SEG layer;
• performing an annealing process on the amorphous silicon layer over an annealing interval, and during the annealing interval applying microwave energy to the amorphous silicon layer to form a single crystal silicon layer from the amorphous silicon layer;
• and,
• forming a second transistor gate structure associated with the second transistor from the single crystal silicon layer.