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US 7,351,628 B2Granted
Atomic layer deposition of CMOS gates with variable work functions
AssigneeMicron Technology, Inc.
InventorsLeonard Forbes, Kie Y. Ahn
Life of this patent
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Abstract
Structures, systems and methods for transistors having gates with variable work functions formed by atomic layer deposition are provided. One transistor embodiment includes a first source/drain region, a second source/drain region, and a channel region therebetween. A gate is separated from the channel region by a gate insulator. The gate includes a ternary metallic conductor formed by atomic layer deposition.
Claims14
A method for forming a transistor pair, comprising:
- forming a PMOS transistor;
- forming an NMOS transistor;
- and
- wherein forming the NMOS and the PMOS transistors includes forming a varied gate composition having a varied work function on each respective transistor in order to control a threshold voltage for each respective transistor to a same magnitude;
- wherein forming a varied gate composition includes:
- forming a gate with a binary metallic conductor for one of the NMOS and PMOS transistors;
- and
- forming a gate with a ternary metallic conductor for the other one of the NMOS and PMOS transistors.
5 more elements
A method for forming a transistor pair, comprising:
- forming a PMOS transistor;
- forming an NMOS transistor;
- and
- wherein forming the NMOS and the PMOS transistors includes forming a varied gate composition having a varied work function on each respective transistor in order to control a threshold voltage for each respective transistor to a same magnitude,
- wherein forming a varied gate composition includes forming a ternary metallic conductor using atomic layer deposition, and depositing a refractory metal on the gate.
2 more elements
Dependencies are inferred from the claim text.