Method for controlling defects in gate dielectrics
AssigneeTexas Instruments Incorporated
InventorsLuigi Colombo, James J. Chambers, Mark R. Visokay, Antonio L. P. Rotondaro
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Abstract
A method for improving high-κ gate dielectric film (104) properties. The high-κ film (104) is subjected to a two step anneal sequence. The first anneal is performed in a reducing ambient (106) with low partial pressure of oxidizer to promote film relaxation and increase by-product diffusion and desorption. The second anneal is performed in an oxidizing ambient (108) with a low partial pressure of reducer to remove defects and impurities.
Claims9
A method for fabricating an integrated circuit, comprising the steps of:
- depositing a high-κ gate dielectric over a surface of a semiconductor body;
- performing a first anneal in a reducing ambient, wherein said reducing ambient comprises an oxidizer at a small partial pressure and a reducer selected from the group consisting of H2, hydrocarbons, and silanes;
- and
- performing a second anneal in an oxidizing ambient, wherein said oxidizing ambient comprises a low partial pressure of reducer and wherein said oxidizing ambient with low partial pressure of reducer comprises an oxidizer selected from the group consisting of O2, N2O and NO and a reducer selected from the group consisting of H2, hydrocarbons, and silanes.
A method for fabricating an integrated circuit, comprising the steps of:
- depositing a gate dielectric over a surface of a semiconductor body;
- performing a first anneal in a reducing ambient with a small partial pressure of oxidizer;
- performing a second anneal in an oxidizing ambient with a low partial pressure of reducer, wherein said oxidizing ambient with low partial pressure of reducer comprises an oxidizer selected from the group consisting of O2, N2O and NO and a reducer comprising H2, hydrocarbons, and silanes;
- and
- then, depositing a gate electrode material over said gate dielectric.
Dependencies are inferred from the claim text.