Programmable digital filter system

An analog-to-digital conversion system comprising:

• an analog-to-digital converter;
• a digital-filter system;
• the digital-filter system connected to the output of the analog-to-digital converter;
• a circuit for sample collection and data-type conversion;
• an FIR filter circuit connected to receive data from, and output filtered data to, the sample capture and data-type conversion circuit;
• a configuration and control-register circuit operatively connected to the circuit for sample collection and data-type conversion and to the FIR filter circuit,
• for selectively controlling the operation of the digital filter system;
• a processor;
• the processor connected to the output of the digital-filter system;
• so that the processor receives filtered sample data in the native format of the analog-to-digital converter.

A method of transparently inserting a digital-filter system in the signal chain of an analog-to-digital converter and processor, comprising the steps of:

• programming a sample capture and data-type conversion circuit to capture data from a pre-selected analog-to-digital converter;
• converting the sample data so captured to a binary format suitable for input to a digital filter;
• normalizing the sample data so captured to a format suitable for input to a digital filter;
• performing a filtering operation on the sample data in the digital filter;
• converting the filtered sample data back to the data format of the pre-selected analog-to-digital converter;
• and,
• outputting the converted sample data to the input of a processor.

An integrated circuit for performing the functions of a digital filter system comprising:

• a circuit for sample collection and data-type conversion;
• the sample collection and data-conversion circuit being selectively programmable to accept the sample data format of a pre-selected analog-to-digital converter;
• an FIR filter circuit connected to receive data from, and output filtered data to, the sample capture and data-type conversion circuit;
• a configuration and control-register circuit operatively connected to the circuit for sample collection and data-type conversion and to the FIR filter circuit,
• for selectively controlling the operation of the digital filter system.

A circuit for sample collection and data-type conversion within a digital-filter system comprising:

• a plurality of registers for holding control parameters for a pre-selected analog-to-digital converter;
• a header shift register for header information from an output stream of a pre-selected analog-to-digital converter;
• a data shift register for sample data from an output stream of a pre-selected analog-to-digital converter;
• a counter register operatively connected to the first and data shift registers for counting the number of bits shifted into the header shift register and the data shift register;
• a circuit connected to the data shift register for converting and normalizing sample data for input to a digital filter circuit;
• and,
• a circuit connected to the digital filter circuit for converting filtered sample data to the format of the pre-selected analog-to-digital converter.

A digital-filter system comprising:

• an FIR filter circuit connected to receive data from, and output filtered data to, a sample capture and data-type conversion circuit;
• the FIR filter circuit further comprising:
• at least two filter sub-circuits for performing digital-filtering calculations;
• each of the at least two filter sub-circuits further comprising clocked registers for data and filter coefficients;
• a clock-generation circuit connected to the clocked registers of the at least two filter sub-circuits;
• the clocked registers of the at least two filter sub-circuits selectively enabled by the clock-generation circuit, corresponding to pre-determined values of filter-tap length, so as to only enable the number of the at least two filter sub-circuits required to perform digital-filtering calculations for the pre-determined filter-tap length.

A digital-filter system comprising:

• an FIR filter circuit connected to receive data from, and output filtered data to, a sample capture and data-type conversion circuit;
• the FIR filter circuit further comprising:
• at least one filter sub-circuit for performing digital-filtering calculations;
• each of the at least one filter sub-circuit further comprising clocked registers for data and filter coefficients;
• a clock-generation circuit connected to the clocked registers of the at least one filter sub-circuit;
• the clocked registers of the at least one filter sub-circuit selectively enabled by the clock-generation circuit, corresponding to pre-determined values of filter-tap length, so as to only enable the number of the at least one filter sub-circuit required to perform digital-filtering calculations for the pre-determined filter-tap length.