Integrated implementation of a collector boost scheme and method therefor
AssigneeSiGe Semiconductor Inc.
InventorEdward J. W. Whittaker
Life of this patent
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Abstract
A collector boost circuit is disclosed for providing a first voltage in a first mode of operation to a power amplifier, and a second voltage in a second mode of operation to the power amplifier. The collector boost circuit uses a switch and an indicator signal for triggering the switch between the first and the second mode of operation. The second voltage is a boosted voltage greater than the first voltage and is provided during peak excursions through a boost capacitor.
Claims46
A circuit comprising:
- a boost capacitor;
- an amplifier voltage supply output port;
- a voltage supply input port for receiving a first voltage;
- an indicator signal input port for receiving an indicator signal;
- at least a switch responsive to the indicator signal for switching between a first mode of operation and a second other mode of operation, where in the first mode of operation, the at least a switch for charging of the boost capacitor and for providing the first voltage to the amplifier voltage supply output port and in the second mode of operation, the at least a switch for providing a boost voltage at the amplifier voltage supply output port in excess of the first voltage, the boost voltage resulting from a cooperation of the boost capacitor and the first voltage;
- an amplifying transistor having a base, an emitter and a collector, wherein the amplifying transistor is coupled for receiving a supply voltage from the amplifier voltage supply output port;
- and
- an RF signal input port for receiving an RF signal and coupled with the amplifying transistor for amplifying of said received RF signal.
A circuit comprising:
- a boost capacitor;
- an amplifier voltage supply output port;
- a voltage supply input port for receiving a first voltage;
- an indicator signal input port for receiving an indicator signal;
- at least a switch responsive to the indicator signal for switching between a first mode of operation and a second other mode of operation, where in the first mode of operation, the at least a switch for charging of the boost capacitor and for providing the first voltage to the amplifier voltage supply output port and in the second mode of operation, the at least a switch for providing a boost voltage at the amplifier voltage supply output port in excess of the first voltage, the boost voltage resulting from a cooperation of the boost capacitor and the first voltage;
- and
- a PFET clamp having at least a diode biasing a bulk thereof, the PFET clamp coupled between a voltage source coupled to the voltage supply input port and the amplifier voltage supply output port, the PFET clamp for supporting, in the second mode of operation, the voltage provided to the amplifying transistor in excess of the first voltage.
A circuit comprising:
- a boost capacitor;
- an amplifier voltage supply output port;
- a voltage supply input port for receiving a first voltage;
- an indicator signal input port for receiving an indicator signal;
- at least a switch responsive to the indicator signal for switching between a first mode of operation and a second other mode of operation, where in the first mode of operation, the at least a switch for charging of the boost capacitor and for providing the first voltage to the amplifier voltage supply output port and in the second mode of operation, the at least a switch for providing a boost voltage at the amplifier voltage supply output port in excess of the first voltage, the boost voltage resulting from a cooperation of the boost capacitor and the first voltage;
- a PFET clamp coupled between the voltage supply input port and a amplifier voltage supply output port, the PFET clamp for supporting, in the second mode of operation, the voltage provided to the amplifying transistor in excess of the first voltage;
- and
- a gate of the PFET clamp driven by a boost buffer coupled between the amplifier voltage supply output port and a floating potential, the floating potential for providing an approximately consistent voltage drop across the boost buffer.
A circuit comprising:
- a boost capacitor;
- an amplifier voltage supply output port;
- a voltage supply input port for receiving a first voltage;
- an indicator signal input port for receiving an indicator signal;
- at least a switch responsive to the indicator signal for switching between a first mode of operation and a second other mode of operation, where in the first mode of operation, the at least a switch for charging of the boost capacitor and for providing the first voltage to the amplifier voltage supply output port and in the second mode of operation, the at least a switch for providing a boost voltage at the amplifier voltage supply output port in excess of the first voltage, the boost voltage resulting from a cooperation of the boost capacitor and the first voltage;
- a PFET clamp;
- and,
- a controller for preventing the switch on of the PFET clamp until the capacitor is at least partially discharged.
A method of improving linearity of a power amplifier comprising:
- amplifying an RF signal to provide an amplified RF signal comprising:
- providing an amplifier circuit including an amplifier voltage input port;
- providing a PFET clamp transistor having parasitic PNP transistors,
- biasing a bulk of the PFET clamp transistor using at least a Schottky diode;
- conducting the at least a Schottky diode before the parasitic PNP transistors of the PFET clamp turn on;
- and,
- discharging the bulk of the PFET clamp using a resistor;
- in a first mode of operation, providing a first voltage potential to the amplifier voltage input port;
- in a second other mode of operation, providing a boosted voltage potential to the amplifier voltage input port, the boosted voltage potential formed by summing a first voltage potential from a voltage supply and a second voltage potential stored within a capacitor;
- and,
- switching from the first mode to the second mode in dependence upon a detected a presence of a peak pulse within the RF signal.
A method of improving linearity of a power amplifier comprising:
- amplifying an RF signal to provide an amplified RF signal comprising:
- providing an amplifier circuit including an amplifier voltage input port;
- in a first mode of operation, providing a first voltage potential to the amplifier voltage input port;
- in a second other mode of operation, providing a boosted voltage potential to the amplifier voltage input port, the boosted voltage potential farmed by summing a first voltage potential from a voltage supply and a second voltage potential stored within a capacitor;
- switching from the first mode to the second mode in dependence upon a detected presence of a peak pulse within the RF signal;
- wherein in both the first and second modes of operation, a voltage potential across a boost buffer is approximately same, but wherein a voltage potential from a negative rails to each of the potentials is different.
A method of improving linearity of a power amplifier comprising:
- amplifying an RF signal to provide an amplified RF signal comprising:
- providing an amplifier circuit including an amplifier voltage input port;
- in a first mode of operation, providing a first voltage potential to the amplifier voltage input port;
- in a second other mode of operation, providing a boosted voltage potential to the amplifier voltage input port, the boosted voltage potential formed by summing a first voltage potential from a voltage supply and a second voltage potential stored within a capacitor;
- and,
- switching from the first mode to the second mode in dependence upon a detected a presence of a peak pulse within the RF signal;
- wherein a trigger point of switching from the first mode to the second mode is continuously varied in further dependence upon a temperature of the amplifier circuit.
A method of improving linearity of a power amplifier comprising:
- amplifying an RF signal to provide an amplified RF signal comprising:
- providing an amplifier circuit including an amplifier voltage input port;
- in a first mode of operation, providing a first voltage potential to the amplifier voltage input port;
- in a second other mode of operation, providing a boosted voltage potential to the amplifier voltage input port, the boosted voltage potential formed by summing a first voltage potential from a voltage supply and a second voltage potential stored within a capacitor;
- switching from the first mode to the second mode in dependence upon a detected a presence of a peak pulse within the RF signal;
- wherein in the first mode of operation, the capacitor is charged by a charging circuit and in the second mode of operation the capacitor is discharged, switching from the second mode of operation to the first mode of operation performed in stages to avoid at least one of transients within the boosted voltage and transients in the internal circuits of the integrated implementation.
A method of improving linearity of a power amplifier comprising:
- amplifying an RF signal to provide an amplified RF signal comprising:
- providing an amplifier circuit including an amplifier voltage input port;
- in a first mode of operation, providing a first voltage potential to the amplifier voltage input port;
- in a second other mode of operation, providing a boosted voltage potential to the amplifier voltage input port, the boosted voltage potential formed by summing a first voltage potential from a voltage supply and a second voltage potential stored within a capacitor;
- switching from the first mode to the second mode in dependence upon a detected a presence of a peak pulse within the RF signal;
- wherein in the first mode of operation the capacitor is charged by a charging circuit and in the second mode of operation the capacitor is discharged, switching from the first mode of operation to the second mode of operation performed in stages to avoid transients within the boosted voltage and transients in the internal circuits of the integrated implementation.
A storage medium having stored therein data, the data for when executed resulting in an amplifier design comprising:
- a boost capacitor;
- an amplifier voltage supply output port;
- a voltage supply input port for receiving a first supply voltage;
- an indicator signal input port for receiving an indicator signal;
- at least a switch responsive to the indicator signal for switching between a first mode of operation and a second other mode of operation, where in the first mode of operation. the at least a switch for charging of the boost capacitor and for providing the first voltage to the amplifier voltage supply output port and in the second mode of operation, the at least a switch for providing a boost voltage at the amplifier voltage supply output port in excess of the first voltage, the boost voltage resulting from a cooperation of the boost capacitor and the first voltage;
- and
- an amplifying transistor having a base, an emitter and a collector, wherein the amplifying transistor is coupled for receiving a supply voltage from the amplifier voltage supply output port.
Dependencies are inferred from the claim text.