Differential receiver
AssigneeSTMicroelectronics Pvt. Ltd.
InventorsSunil C. Kasanyal, Rajat Chauhan
Life of this patent
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Abstract
A differential receiver includes a feedback circuit connected between an output node and one common node of the differential receiver to reduce the bandwidth and reject noise for a specific interval of time. In operation, a differential receiver bias current is controlled responsive to an output signal at the output node. Bias current is turned on during a steady-state mode with respect to the output signal, and is turned off, for a given delay period, in response to a transition mode with respect to the output signal.
Claims22
A differential receiver, comprising:
- a differential circuit having a differential output node and at least one common node;
- and
- a feedback circuit connected to receive a signal from the differential output node and generate a feedback signal in response thereto, the feedback circuit connected to control the at least one common node so as to reduce receiver bandwidth and reject noise for a specific interval of time.
A differential receiver, comprising:
- a pair of differential input transistors coupled at a common node and whose gates receive a differential input signal;
- a pair of load transistors coupled to the pair of differential input transistors to form at least one differential output node;
- a current sink circuit coupled to the common node of the pair of differential input transistors;
- and
- a feedback circuit coupled to receive an output signal from the differential output node and apply a feedback signal to the current sink circuit in response to the output signals,
- wherein the feedback circuit comprises a time delay circuit having an output and an input coupled to the differential output node and a logic circuit having an input coupled to the output of the time delay circuit and an output coupled to the current sink circuit.
A differential receiver, comprising:
- a pair of differential input transistors coupled at a common node and whose aates receive a differential input signal;
- a pair of load transistors coupled to the pair of differential input transistors to form at least one differential output node;
- a current sink circuit coupled to the common node of the pair of differential input transistors;
- and
- a feedback circuit coupled to receive an output signal from the differential output node and apply a feedback signal to the current sink circuit in response to the output signal;
- wherein the current sink circuit comprises a current mirror circuit having a mirror branch coupled to the common node and a reference branch whose current is controlled by the feedback circuit.
A method, comprising:
- differentially receiving a signal to generate an output signal at a differential output of a differential receiver;
- and
- controlling differential receiver bias current responsive to the output signal wherein controlling comprises:
- turning bias current on during a steady-state mode with respect to the output signal;
- and
- turning bias current off in response to a transition mode with respect to the output signal.
A method for rejecting noise signals by a differential receiver comprising:
- detecting an input signal by the differential receiver;
- and
- outputting a response from the differential receiver to a feedback circuit for reducing a current flowing through the differential receiver and thereby reducing a bandwidth of the differential receiver in order to reject noise for a specific interval of time.
Dependencies are inferred from the claim text.