Slew rate enhancement circuitry for folded cascode amplifier

An operational amplifier comprising:

• (a) a differential input stage including
• i. a first input transistor, a first current source transistor, and a first cascode transistor each having first and second electrodes and a control electrode, the control electrode being connected to a first input voltage, the first electrode being connected to a tail current source, and the second electrode being connected the second electrode of the first current source transistor and the first electrode of the first cascode transistor, and
• ii. a second input transistor, a second current source transistor, and a second cascode transistor each having first and second electrodes and a control electrode, the control electrode of the second input transistor being connected to a second input voltage, the first electrode of the second input transistor being connected to the tail current source, the second electrode of the second input transistor being connected to the second electrode of the second current source transistor and the first electrode of the second cascode transistor;
• (b) a class AB output stage including a pull-up transistor and a pull-down transistor each including first and second electrodes and a control electrode, the AB output stage also including a first bias transistor connected between the control electrode of the pull-up transistor and the control electrode of the pull-down transistor, the control electrode of the pull-down transistor being connected to the second electrode of the first cascode transistor;
• (c) a first slew boost circuit having an input connected to the second electrode of the first input transistor and an output connected by means of a current mirror connecting circuit to the control electrode of the pull-up transistor for amplifying an excess of tail current steered into the input of the first slew boost circuit over a current flowing in the first current source transistor and applying the amplified excess to boost the slew rate of the class AB output stage in accordance with a first polarity of the difference between the first and second input voltages;
• and
• (d) a second slew boost circuit having an input connected to the second electrode of the second input transistor and an output connected by means of a cascode connecting transistor to the control electrode of the pull-down transistor for amplifying an excess of tail current steered into the input of the second slew boost circuit over a current flowing in the second current source transistor and applying the amplified excess to boost the slew rate of the class AB output stage in accordance with a second polarity of the difference between the first and second input voltages.

An operational amplifier comprising:

• (a) a differential input stage including
• i. a first input transistor having a gate coupled to a first input voltage, a source connected to a tail current source, and a drain coupled to a drain of a first current source transistor and a source of a first cascode transistor, and
• ii. a second input transistor having a gate coupled to a second input voltage, a source connected to the tail current source, and a drain coupled to a drain of a second current source transistor and a source of a second cascode transistor;
• (b) a class AB output stage including a pull-up transistor, a pull-down transistor, a first bias transistor connected between a gate of the pull-up transistor and a gate of the pull-down transistor, the gate of the pull-down transistor being connected to a drain of the first cascode transistor;
• (c) a first slew boost circuit having an input connected to the drain of the first input transistor and an output connected by means of a current mirror connecting circuit to the gate of the pull-up transistor for amplifying an excess of tail current steered into the input of the first slew boost circuit over a current flowing in the first current source transistor and applying the amplified excess to boost the slew rate of the class AB output stage in accordance with a first polarity of the difference between the first and second input voltages;
• and
• (d) a second slew boost circuit having an input coupled to the drain of the second input transistor and an output connected by means of a cascade connecting transistor to the gate of the pull-down transistor for amplifying an excess of tail current steered into the input of the second slew boost circuit over a current flowing in the second current source transistor and applying the amplified excess to boost the slew rate of the class AB output stage in accordance with a second polarity of the difference between the first and second input voltages.