Multisection memory bank system

A memory having words that are addressable by addresses, the memory comprising:

• a plurality of sections that each contain a subdivision of each word;
• and
• means for selectively disabling a section so that a row enable line to the disabled section is not enabled when a word is accessed and so that accesses to the memory access a subdivision of words that does not include the subdivision of the disabled section whereby power is saved because the section is disabled.

A memory bank having multiple sections containing words that are addressable by addresses, the memory bank comprising:

• a plurality of sections, each section representing a subdivision of a word of memory;
• and
• enabling logic coupled to the plurality of sections and generating enable signals to selectively enable or disable each of the plurality of sections, wherein a section is enabled when a subdivision of a word contained within the section is accessed, and a section is disabled to reduce power consumption when a subdivision of a word contained within the section is not being accessed.