Methods and apparatus for synchronizing devices on different serial data buses
AssigneePoint Grey Research Inc.
InventorsRoderick A. Barman, Stewart J. Kingdon, Timothy D. Vlaar
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Abstract
The invention provides a method of synchronizing one or more devices on a first bus with one or more devices on a second bus. The method comprises acquiring timing information from the first bus and the second bus, determining a timing offset between the first bus and the second bus, and, broadcasting the timing offset to the one or more devices on the second bus so that the one or more devices on the second bus can adjust their timing to be synchronized with the one or more devices on the first bus.
Claims26
A method of synchronizing one or more devices on a first bus, the first bus associated with a first clock for generating first bus timing information for the first bus with one or more devices on a second bus, the second bus associated with a second clock for generating second bus timing information for the second bus, each of the devices having an individually adjustable timing, the method comprising:
- acquiring the first bus timing information and the second bus timing information from the first bus and the second bus respectively;
- determining a timing offset between the first bus and the second bus;
- and,
- broadcasting the timing offset to the one or more devices on the second bus;
- and,
- adjusting the timing of the one or more devices on the second bus to be synchronized with the one or more devices on the first bus based upon the broadcast timing offset and the second bus timing information wherein the one or more devices on the second bus comprise cameras and the cameras adjust their timing by selectively reading an adjustable amount of extra data from a light-sensing array for each frame.
A method of synchronizing one or more devices on a first bus, the first bus associated with a first clock for generating first bus timing information for the first bus with one or more devices on a second bus, the second bus associated with a second clock for generating second bus timing information for the second bus, each of the devices having an individually adjustable timing, the method comprising:
- providing a master bus on which a global time is broadcast by a master clock;
- acquiring the first bus timing information and the second bus timing information from the first bus and the second bus respectively;
- determining a first timing offset between the first bus and the master bus;
- determining a second timing offset between the second bus and the master bus;
- and,
- broadcasting the first timing offset to the one or more devices on the first bus and broadcasting the second timing offset to the one or more devices on the second bus;
- and,
- adjusting the timing of the one or more devices on the first bus based upon the first timing offset and the first bus timing information and adjusting the timing of the one or more devices on the second bus based upon the second timing offset and the second bus timing information so that the one or more devices on the first bus and the one or more devices on the second bus all begin their respective operational cycles at the same global time wherein the one or more devices on the second bus comprise cameras and the cameras adjust their timing by selectively reading an adjustable amount of extra data from a light-sensing array for each frame.
An apparatus for synchronizing one or more devices on a first bus, the first bus associated with a first clock for generating first bus timing information for the first bus with one or more devices on a second bus, the second bus associated with a second clock for generating second bus timing information for the second bus, each of the devices having an individually adjustable timing, the apparatus comprising:
- a first interface coupled to the first bus;
- a second interface coupled to the second bus;
- a processing element coupled to the first and second buses by the first and second interfaces respectively to receive the timing information for the first and second buses;
- a program memory coupled to the processing element, the program memory containing software instructions programmed to cause the processing element to calculate a timing offset between the first bus and the second bus and broadcast the timing offset to the one or more devices on the second bus by means of the second interface;
- and,
- a timing control system in each of the one or more devices on the second bus, the timing control systems each configured to adjust a timing of a corresponding one of the devices based upon the second bus timing information and the timing offset wherein the one or more devices on the second bus comprise cameras and the cameras adjust their timing by selectively reading an adjustable amount of extra data from a light-sensing array for each frame.
Dependencies are inferred from the claim text.